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This paper presents a wide intermediate-frequency (IF) bandwidth down-conversion double-balanced Gilbert-cell mixer design in a 0.13-μm CMOS process. The load stage of the mixer is implemented by an LC tank with switched capacitors to complete three selectable sub-bands to cover the desired wide IF band. Both the RF and LO ports are integrated with Marchand baluns for single-phase input consideration...
A DC-invariant gain control technique is introduced for differential CMOS variable-gain low-noise amplifiers (VG-LNA). Such technique provides an advantage of invariant DC bias current when the RF power gain is tuned over the gain control range. Therefore, the transconductance of NMOS transistor is unchanged, which minimizes the input match detuning. Consequently, the optimal design for noise, gain...
A 1-5 GHz ultra-wideband CMOS low-noise amplifier (LNA) is presented. A common-gate topology is adopted for the input stage to achieve wideband input matching, while a cascode stage is used as the second stage to provide power gain at high frequencies. By using two inductors in the LNA, a small chip area is obtained. The LNA has been fabricated in a standard 0.18 μm CMOS technology. The measured maximum...
This paper presents the design and the measurement results of a 3-5-GHz down-converter fabricated in a 90-nm CMOS technology. The circuit consists of a single-ended resistive-feedback low-noise amplifier and two I/Q double-balanced mixers. A transformer-based on-chip single-ended-to-differential conversion allows gain and noise performance to be optimized at a very-low power. A post-layout stability...
An optimum gate-loaded cascode topology for maximizing the gain of a stable CMOS amplifier in micro/millimeter wave band is presented. By adding a piece of transmission line in the gate of cascode transistor, choosing an appropriate matching circuit that includes biasing, and exploiting the proper transmission line structure the gain per stage of CMOS amplifier can be increased and an optimum design...
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