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Quadrature downconversion impairments should be taken into account and compensated to the increasing of the Direct Conversion Receiver (DCR) reception quality. DC-offset and I/Q-imbalance are fitted into this group. Experimental estimation of two relatively simple compensation methods for the indicated drawbacks is reviewed in the paper. Energy efficiency and computational complexity estimation are...
This paper presents an improved FPGA-based torque and stator flux estimators for direct torque control (DTC) induction motor drives, which permit very fast calculations. The improvements are performed by 1) using two's complement fixed-point format approach to minimize calculation errors and the hardware resources usage in all operations, 2) calculating the discrete integration operation of stator...
Modern codes such as Turbo and LDPC codes operate at low signal-to-noise ratios, which makes carrier synchronization a challenging problem. Hence in many waveforms, some known symbols are inserted periodically into the data stream to achieve Data-Aided (DA) synchronization. However, these known symbols decrease the throughput of the transmissions. The data symbols which are unknown can also be used...
The demand for highly dynamic electrical drives, characterized by high quality torque control, in a wide variety of applications has grown tremendously during the past decades. Direct torque control (DTC) for permanent magnet synchronous motors (PMSM) can provide this accurate and fast torque control. When applying DTC the change of the stator flux linkage vector is controlled, based on torque and...
In this paper, we present an FPGA implementation of real-time Retinex video image enhancement. Our implementation is based on the previously proposed architecture, which can handle the variational approach of the Retinex theory. In order to efficiently reduce the enormous computational cost required for image enhancement, processing layers and repeat counts of iterations are determined in accordance...
The Paper presents the outlines of the field programmable gate array (FPGA) implementation of real time speech enhancement by spectral subtraction of acoustic noise using dynamic moving average method. It describes an stand alone algorithm for speech enhancement and presents a architecture for the implementation. The traditional spectral subtraction method can only suppress stationary acoustic noise...
Carrier Frequency Offset (CFO) estimation and correction is a critical issue in all OFDM receivers. For WiMAX Physical layer it is even more challenging to introduce a suitable CFO sub-system since WiMAX system supports complex features for future applications such as multiuser, multi-access and high mobility operation. This paper is concerned with low cost hardware implementation of CFO sub-system...
A new strategy to realize an FPGA implementation of a soft sensor for an industrial process is proposed. In order to cope with the problem of small data sets in the identification of a non linear model the proposed approach is based on the integration of bootstrap re-sampling, noise injection and stacked neural networks (NNs), using the Principal Component Analysis (PCA). The aggregated final NN-PCA...
In this paper two section array and the arithmetic of DOA are studied on the eight elements array antennas and DOA arithmetic is designed on the FPGA. The directional characteristic of the line array and the elliptic array antenna is compared, proving that the line array and the circuit array can be consolidated in the elliptic array and deducting the uniform expression for array performance, forth...
Large scale adaptive beamformers for monopulse radars are difficult to implement on distributed FPGA arrays due to their computational complexity and/or data bandwidth requirements between FPGA processors. In monopulse target estimation, a 2D antenna array of 64 elements is employed for horizontal and vertical polarizations. For such a system sum and difference beamformers are required to estimate...
Wireless sensor network (WSN) applications demand ultra low power devices. Digital Ultra Wideband (UWB) transceiver can be used as the communication module in a WSN due it its potential for location tracking, ranging and low data rate communication. Current digital UWB receiver architecture incorporates heavy parallelism, which significantly increases power consumption, especially during the acquisition...
The main objective of this research is to present a fast and efficient method based on genetic algorithms (GAs) to measure the frequency deviation, as well as the voltage magnitude and phase angle of a noisy sinusoid wave. The frequency estimation is formulated as an optimization problem, where the aim is to minimize the estimation error. The use of GAs has an advantage of better immunity against...
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