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As technology is scaled down, supply voltage and gate capacitances are reduced which degrades the reliability of the circuits. For near sub-threshold region design, this causes even more serious reliability issues because the supply voltage is reduced to near the threshold voltage of the devices. Soft error is one such phenomenon which changes internal node voltage due to external noise. Hence it...
As technology scales down in the deep sub-micron/nano ranges, CMOS circuits are more sensitive to externally induced phenomena to likely cause the occurrence of so-called soft errors. Therefore, the operation of these circuits to tolerate soft errors is a strict requirement in todaypsilas designs. Traditional error tolerant methods result in significant cost penalties in terms of power, area and performance,...
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