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Packet Classification involves matching information from a packet's header to a set of rules in a database in order to determine the manner in which the packet should be processed by network processors. The PCIU algorithm is a novel classification algorithm which improves upon previously published techniques in the literature. The main features of the PCIU algorithm are the low pre-processing time...
Hardware/Software partitioning is one of the critical steps in Hardware/Software Co-Design flow, and has very important influence on the system performance. Hardware/Software partitioning is also a NP-hard problem. In this paper, we present a new Hardware/Software partitioning algorithm called PSO-IC for heterogeneous multicore SOC, which combines particle swarm optimization (PSO) algorithm and immune...
This paper presents a hybrid method based on Discrete Particle Swarm Optimization (DPSO) and Branch-and-Bound (B&B) algorithms to solve Hardware/Software partitioning problems. In this approach, some pre-defined relations are used to present a formal solution for the partitioning problem. Then, DPSO is used to increase the speed of B&B. Results of experiments show that in case the problem...
Our objective is to provide an enhanced algorithm for the FASTCAM instrument, developed by the Instituto de Astrofísica de Canarias in collaboration with the Universidad Politécnica de Cartagena. In this paper we propose an algorithm for the detection of astronomical objects and its implementation on a High Performance Reconfigurable Computer. Our algorithm introduces wavelet based preprocessing...
Hardware/software (HW/SW) partitioning is one of the crucial steps of co-design systems. It determines which components of the system are implemented in hardware and which ones are in software. As hardware of larger area may provide higher implementing speed for a give component due to the parallelizable execution in hardware, one component may have different ways of hardware implementations. In this...
Our objective is to provide an enhanced algorithm for the FASTCAM instrument, developed by the Instituto de Astrofi??sica de Canarias in collaboration with the Universidad Polite??cnica de Cartagena. In this paper we propose a versatile algorithm, based on the CNN paradigm, which can be adapted to the detection of several astronomical objects. We also propose an implementation architecture that makes...
Hardware Software partitioning is one of the most significant part of Hardware Software co-design of embedded systems, which is directly related to performance and cost. A lot of works have been done such as the simulated annealing algorithm, greedy algorithm and evaluation algorithm. In this paper, a new hardware software partitioning method based on Immune Algorithm was introduced. The model of...
One of most popular algorithms for finding a path between any two pins on a planar graph is Lee's algorithm. In this paper, three different approaches are proposed and investigated for accelerating Lee's algorithm. The first approach is based on a hardware/software co-design strategy, while the second is a custom hardware implementation using Handel-C. An application specific instruction implementation...
The rapid increase in the distribution of digital multimedia data over networks creates the need for copyright protection. Watermarking is one of the techniques that can be used for this copyright protection. Many authors have proposed pure software or hardware solutions for the implementation of watermarking algorithms. In this paper we propose a hardware/software co-design approach for the implementation...
Reconfigurable system-on-chip (RSoC) is a promising alternative to deliver both flexibility and performance at the same time, and also a technical solution looking to the future needs of embedded applications. But the complex design process is impeding the development of extensive applications. This paper proposes an RSoC design methodology based on function-level programming model on account of the...
This paper describes the implementation of digital audio effect SoC (system on chip) which integrates the embedded DSP core, audio codec IP, a number of peripheral blocks and various audio effect algorithms. The audio effect SoC is developed by a software and hardware co-design method. The embedded DSP and some dedicated hardware blocks are developed as a hardware design while the audio effect algorithms...
This paper proposes a hybrid branch and bound strategy based on global best-first (GBF) scheme and local best-first (LBF) scheme.The proposed hybrid approach not only inherits the merit of GBF that produces fewer expanded nodes but also significantly reduces the search space of GBF, and thus it efficiently overcomes the blind search of the LBF scheme. A new data structure called string-queue is also...
Hardware/software (HW/SW) partitioning is one of the crucial steps of co-design systems. It determines which components of the systems are implemented in hardware and which ones are in software. In this paper the computing model is extended to cater for the path-based HW/SW partitioning with the fine granularity in which communication penalties between system components must be considered. On the...
This paper presents the implementation of QR Decomposition based Recursive Least Square (QRD-RLS) algorithm on Field Programmable Gate Arrays (FPGA) using hardware-software co-design. The system has been implemented on Xilinx Spartan 3E FPGA with Microblaze soft core processor. The hardware part consists of a custom peripheral that solves the part of the algorithm with higher computational costs and...
The AES encryption/decryption algorithm is widely used in modern consumer electronic products for security. To shorten the encryption/decryption time of plenty of data, it is necessary to adopt the algorithm of hardware implementation; however, it is possible to meet the requirement for low cost by completely using software only. How to reach a balance between the cost and efficiency of software and...
Watershed transformation is a powerful technique that can be efficiently used for image segmentation. In this paper, we implement a watershed based segmentation algorithm on a Virtex II Pro platform. The main contribution of this work is the low execution time and minimal internal FPGA consumed resources. The proposed architecture includes two main blocs. First, a gradient of the image is generated...
One of the most crucial steps in the design of embedded systems is deciding which components of the system should be implemented in software and which ones in hardware. Inspired by genetic algorithm (GA) and tabu search (TS), this paper puts forward a hybrid strategy (GATS) to solve the software-hardware partitioning problem in embedded system. The main frame of GATS is provided by genetic algorithm...
Hardware/software partitioning is a key problem in hardware/software co-design and global optimums detection of the objective function is of vital importance in hardware/software partitioning. Though stochastic optimization strategies simulating evolution process are proved to be valuable tools, the balance between exploitation and exploration of which is difficult to be maintained. In this paper,...
This paper discusses a hardware accelerated implementation for PNG image decoding within LZ77 and Huffman compression algorithm without any distortion, while compare with software decoding, parallel processing is the most significant feature of high efficiency. This design utilize cooperating of software and hardware to solve the problem of controlling hardware decoder, extend Deflate algorithm of...
The RTOS (Real-Time Operating System) is a critical component in the SOPC (System-On-Programmable-Chip), in which the hardware-software unified multi-task management and scheduling of RTOS can significantly improve the performance of SOPC. First, we build a unified scheduling policy based on hardware-software unified multi-task management model. Then, we analyze the shared resources competition problem...
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