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We report a two-dimensional (2D) pixel block scanning architecture for image segmentation by segment growing. This architecture can optimize processing speed, power consumption, and circuit area by modifying size and shape of the pixel block. Real-time processing can be maintained by using additional the two important techniques of (i) boundary-scan of the grown segment only, (ii) continued block-internal...
We propose a high-speed mixed integer quadratic programming (MIQP) solver on an FPGA. The MIQP solver can be applied to various optimizing applications including real-time robot control. In order to rapidly solve the MIQP problem, we implement reusing a first solution (first point), pipeline architecture, and multi-core architecture on the single FPGA. By making use of them, we confirmed that 79.5%...
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