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In this paper we propose and investigate some simplifications to the original Histogram of Oriented Gradients (HOG) algorithm, in order to allow a more efficient hardware implementation, while keeping the overall classification accuracy. The most aggressive simplification is the removal of the bin interpolation step in the algorithm, which does not affect the classification performance, but significantly...
According to the wide developments in the area of communications, there is a demand for secure system for data transmissions. In this paper, a Hash system SHA-1 and SHA-2 Processor is designed using Xilinx Spartan-3AN. The implementation of the processor is done by using Multithreading MIPS (Microprocessor without Interlocked Pipelines) single cycle by choosing a certain number of instructions that...
Cardiovascular system is the most important part of human body which has role as distribution system of Oxygen and body's wastes. To do the job, there are more than 60.000 miles of blood vessels participated which can caused a problem if one of them are being clogged. Unfortunately, the conditions of clogged blood vessels or diseases caused by cardiovascular malfunction could not be detected in a...
Advanced driver assistance systems (ADAS) are the key to enable autonomous cars in the near future. One important task for autonomous cars is to detect pedestrians reliably in real-time. The HOG algorithm is one of the best algorithms for this task; however it is very compute intensive. To fulfill the real-time requirements for high resolution images an efficient parallel implementation is necessary...
We report the implementation of an adaptive spectral sensing algorithm in hardware description language for IR target classification. The synthesized logic performs computation in digital domain between IR test input and a set of prescribed algorithmic weights to extract desired spectral information from targets as well as identifying its class.
As the Information and Communication (ICT) infrastructure continues to evolve, throughput and energy efficiency have become key metrics. This talk explores FPGA-based parallel architectures and algorithms for a variety of streaming applications arising in Telecom and Big Data. We show high performance accelerators for deep packet inspection, regular expression matching, packet classification, traffic...
One of the most important challenges in the field of Computer Vision is the implementation of low-power embedded systems that will execute very accurate, yet real-time, algorithms. In the visual tracking sector one of the most promising approaches is the recently introduced OpenTLD algorithm which uses a random forest classification method. While it is very robust, it cannot be efficiently parallelized...
In This paper we propose a novel method for reducing power consumption in TCAM based packet classification. TCAMs are becoming very popular for designing high-throughput for packet classification. They are fast and simple to manage. However, due to their inherent parallel structure, a major drawback of TCAM is their high power consumption. Our method is based on using TCAM and its implementation on...
SRAM-based FPGAs are increasingly used in many applications. However, when used in critical embedded systems, their main drawback is the sensitivity of the configuration memory to external perturbations. Configuration errors can lead to erroneous results, but also to function modifications and SEFIs (Single Event Functional Interrupts). Consequences of configuration modifications must therefore be...
We discuss FPGA implementations of object (such as face) detectors in video streams using the accurate Haar-feature based algorithm. Rather than creating one implementation for one FPGA, we develop a method to generate a series of implementations that have different size and performance to target different FPGA devices. The automatic generation was enabled by custom design space exploration on a particular...
The Advanced Encryption Standard can be programmed in software or built with pure hardware. However Field Programmable Gate Arrays (FPGAs) offer a quicker, more customizable solution. This research investigates the AES algorithm with regard to FPGA and the Very High Speed Integrated Circuit Hardware Description language (VHDL). Software is used for simulation and optimization of the synthesizable...
Multi-dimensional packet classification is a key task in network applications, such as firewalls, intrusion prevention and traffic management systems. With the rapid growth of network bandwidth, wire speed multi-dimensional packet classification has become a major challenge for next-generation network processing devices. In this paper, we present a FPGA-based architecture targeting 100 Gbps packet...
Jawi is a Malay writing script based on the Arabic script which adds six extra characters to accommodate Malay vocal sounds. Real-Time Speech-To-Text Engine for Jawi Character aims to help students to read Jawi more effectively. In this paper, we investigate the suitable method and device that best for speech-to-text hardware implementation. A complete set of Jawi Speech-To-Text tools will be implements...
Many of the OCR (Optical Character Recognition) systems are software solutions, based on PC or network based services. Hardware or embedded types of OCR systems, implemented in scanners, suffer from poor algorithm flexibility. The reasons of this situation are the cost and the time needed to design flexible hardware based system. The purpose of this work is to develop a simple algorithm for a standalone...
Principles of verification for FPGA electronic design algorithms used in nuclear reactor trip systems are proposed. A classification of the algorithms that is based on complexity criterion is given. Various methods and techniques for testing of the algorithms are described. It is presented an example of verification, based on proposed methods and techniques, for standard algorithm of reactor trip...
This paper presents an implementation of starfruit maturity classification algorithm in an embedded real-time system. In order to do classification for the starfruit, the maturity of the starfruit is classified based on new color feature, which is the hue between 2 color component of red and green denoted as C. Field Programmable Gates Array (FPGA) is selected to be the main processor of the system...
A novel real-time signal processing device has been designed and implemented for improved target feature extraction, discrimination, and tracking. The device utilizes a unique combination of advanced signal processing techniques for multi-spectral fusion and image analysis. It incorporates state-of-the-art algorithm and the associated electronics to combine the functions of a multi-spectral fusion...
The paper describes the problem of shadow detection in video sequences. Based on the methods known from the literature, a novel shadow detection algorithm has been developed, working in real-time and intended for hardware implementation in FPGA. The algorithm has been tested and compared to the existing ones in the MATLAB environment. The shadow detection system has been implemented in Virtex-4 FPGA...
This paper relates to the research on a dexterous hand prosthesis conducted at the Wroclaw University of Technology. The possibility of aiding the prosthesis control system by utilization of application specific digital circuits is presented. Several exemplary designs, prepared during some of to-date works conducted by authors, have been presented. Discussed solutions are part of a bigger project...
In agriculture, industrial visual inspection systems are important for rapid classification during post-harvest handling, where many decisions have to be rapidly made in a fruit-by-fruit basis in terms of type and quality of the produce. Solutions have been proposed to classify many different types of fruits, but these solutions are highly specific to the applied problem so there is no room for knowledge...
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