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A HEMT model is proposed that correctly isolates the access metallization from the intrinsic device to give linear scalability. The model uses a distributed network of intrinsic unit cells composed of lumped elements. The topology of these networks is determined such that a scalable set of parameters is obtained. The parameters for the intrinsic and extrinsic parts of the transistor have been extracted...
This paper presents an alternative topology for realizing a four-quadrant amplifier with single-ended output. In the proposed multiplier, constituting differential circuits are vertically arranged resulting in single-ended current output with output DC voltage equal to a half of supply voltage. Since the circuit operates in a current-reused mode, the power consumption is systematically reduced by...
This paper discusses the design of a 60 GHz low noise amplifier (LNA) using a standard low power SOI CMOS process from ST Microelectronics. First, we outline the technology as well as the mm-wave design challenges. Using recent work on coplanar waveguide (CPW) modeling, we describe how it's possible to use parametric, 3D electromagnetic simulation to complete or replace analytical models of on-chip...
A high intercept points, cost-effective, and power-efficient switching FET double balanced mixer (DBM) is reported. The Switching FET DBM demonstrated in this work offers input intercept points (IIP3) and conversion loss typically 44 dBm and 8.5 dB respectively with 15 dBm LO power for the frequency band (RF: 900-2150 MHz, LO: 850-1950 MHz, IF: 50-200 MHz). The measured interport isolation is typically...
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