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Diagnosis of functional failures is critical for locating manufacturing defects, increasing yield, and reducing field returns. It is important to narrow down the defective module in a failed component during board-level diagnosis. In this paper, a generic fault-diagnosis method based on an error-flow dictionary is presented to identify the root cause of functional failures on a chip or board. Error...
In semiconductor industry, designing a SoC is a complex process. Designing reliable SoCs includes study of various configurations involving different operating conditions and considering both hard and soft errors. Designers at higher level of abstraction already have many ways to remove or handle soft errors. This paper aims at analyzing hard errors at functional level. We propose a methodology using...
This paper presents a new type of a more complete system verification method, which combines a high-level verification methodology based on verification methodology manual (VMM) techniques for functional simulation and system-on-a-programmable-chip (SOPC) techniques for board-level verification, effectively improve the adequacy and reliability of verification and validation efficiency. This paper...
To ensure that an intellectual property (IP) block is validated ahead of its use in an `unknown' system-on-chip (SoC) context, an holistic view of the integration process must be taken. We will focus on the challenges faced in integrating and manufacturing advanced low-power processor based SoC systems, which have dramatically increased the complexity & state space for logical and electrical validation...
This paper presents a random bit source circuit for information security SoC platform application. A new type of oscillator, taking the form of combinational logic circuit and using complex feedback networks, is applied in the circuit. A series of MATLAB/Simulink models based on the circuit structure are established for the random bit source. To improve the accuracy, models for the two dominant noise...
In this paper, a novel diagnosis method is proposed. The proposed technique uses machine learning techniques instead of traditional cause-effect and/or effect-cause analysis. The proposed technique has several advantages over traditional diagnosis methods, especially for volume diagnosis. In the proposed method, since the time consuming diagnosis process is reduced to merely evaluating several decision...
The visualization and interaction of the photolithography simulation result is useful and challenging for SOC design. Traditionally, to render large scene of wafer requires highly complex shapes with ever more triangles. Processing many small triangles leads to bandwidth bottlenecks and excessive floating point. To cope with this problem, we introduce surfel based algorithms. Surfel is point primitive...
SystemC is emerging as a de-facto standard for digital system design. Since embedded systems include more and more heterogeneous components (e.g., analog/RF front-ends, processor cores, embedded software, digital hardware, sensors, actuators), the need for also supporting continuous-time models of computation in SystemC is growing. This paper reviews the main efforts to date for augmenting SystemC...
SystemC has become a de facto standard for the system-level description of systems-on-a-chip. SystemC/TLM is a library dedicated to transaction level modeling. It allows to define a virtual prototype of a hardware platform, on which the embedded software can be tested. Applying formal validation techniques to SystemC descriptions of SoCs requires that the semantics of the language be formalized. The...
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