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The conductance along the interface between an as-deposited pure boron layer and n-type Si, fabricated at 400 °C, is found to be reliably formed with high-ohmic sheet resistance values going from $\sim 30$ k$\Omega $ /sq to 1 M$\Omega $ /sq, depending on the exact substrate doping and biasing. The temperature coefficient is negative. It is proposed that this behavior is due to an interface monolayer...
Stress sensing test chips are widely utilized to investigate integrated circuit die stresses arising from assembly and packaging operations. In order to utilize these test chips to measure stresses over a wide range of temperatures, one must have values of six piezoresistive coefficients for n- and p-type silicon over the temperature range of interest. However, the literature provides limited data...
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