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Signal processing requires high performance digital signal processors(DSP) and hardware accelerators. Real and complex multiply-accumulate(MAC) units are the most critical computation units in the DSPs and accelerators, which greatly impact the performance, power and chip area of the signal processing system. A fixed-point Single-Instruction-Multiple-Data(SIMD)/vector MAC architecture is presented...
In the area of signal processing, digital circuits are advantageous in terms of lower sensitivity to noise and process variations, simplicity of design, programmability and test, while they attain higher speed, more functionality per chip, lower power dissipation or lower cost. Since some of DSP algorithms heavily rely on multiplication, there are constant demands for more efficient multiplication...
Coordinate rotation digital computer (CORDIC) based digital signal processing has become an important tool in consumer, communications, biomedical, and industrial products, providing designers with significant impetus for porting algorithm into architecture. Unfolded implementations of CORDIC algorithm can achieve low latency for rotation and various functions such as division, multiplication, logarithmic...
This paper investigates the use of residue arithmetic as a tool to reduce the switching activity in a DSP system. As shown the output data sequence of binary-to-residue converters is decorrelated, output switching activity is decreased in practical cases, when compared to switching activity in an two's-complement based system. Experimental results provide power consumption details for binary-to-RNS...
The signal processing algorithms face many challenges in real-time applications because of their high computational complexity. Therefore, the major issues have been the enhancement of speed of the arithmetic units in general and multiplications and additions in particular. Double based number systems (DBNS) are increasingly gaining popularity for their capabilities of handling arithmetic operations...
In many DSP applications (image and voice processing, baseband symbol decoding in high quality communication channels) several dBs of SNR loss can be tolerated without noticeable impact on system level performance. For power optimization in such applications, voltage overscaling can be used to operate the arithmetic circuitry slower than the critical circuit path delay while incurring tolerable SNR...
FFT algorithm is the popular software design for spectrum analyzer, but doesnpsilat work well for parallel hardware system due to complex calculation and huge memory requirement. Observing the key components of a spectrum analyzer are the intensities for respective frequencies, we propose a Goertzel algorithm to directly extract the intensity factors for respective frequency components in the input...
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