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This paper presents the proposal of a new front-end readout electronics (RO) architecture for the ALICE Charged-particle Veto detector (CPV) located in PHOton Spectrometer (PHOS), and for the High Momentum particle IDentification detector (HMPID). With the upgrades in hardware typology and proposed new readout scheme in FPGA design, the RO system shall achieve at least five times the speed of the...
In the present industrial field real-time data acquisition system, there are some major performance problems in Ethernet for real-time communication. Such as bandwidth utilization, synchronous accuracy, delay switch. Now, EtherCAT can effectively improve the performance problems about Ethernet real-time communication which those have discussed above. In industrial field, it is very important for data...
In order to overcome the limitation of traditional data-acquisition card based on PCI bus, a novel data-acquisition system featuring high-speed and high-accuracy is implemented based on real-time industrial internet technology EtherCAT(Ethernet for Control Automation Technology). Without the requirement of a dedicated hardware card of IPC(Industrial PC), such kind of data acquisition system can be...
This paper focuses on the design and concepts of the hierarchically structured Data Acquisistion (DAQ) network for the Compressed Baryonic Matter (CBM) experiment at the Facility for Antiproton and Ion Research (FAIR) in Darmstadt. Due to the limited physical space and the requirement for a multi TB/s DAQ within the system, this experiment requires compact read-out hardware which provides high bandwidth...
The Data Acquisition Backbone Core (DABC) is a new GSI software framework to run data acquisition with distributed event building on high performance Linux clusters. Experimental data input is provided by means of generic Device and Transport interfaces. DABC offers elaborate mechanisms for multiprocessing, buffer management, and dataflow throttling. These are transparently available for all implemented...
We present a fully operable security gateway prototype, integrating quantum key distribution and realised as a system-on-chip. It is implemented on a field-programmable gate array and provides a virtual private network with low latency and gigabit throughput. The seamless hard- and software integration of a quantum key distribution layer enables high key-update rates for the encryption modules. Hence,...
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