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The paper presents a method that allows formal refinement of BSP programs. We may consider a BSP program as a set of parameterized processes that communicate via message-passing. A parameterized process is refined into a sequence of BSP super steps each containing an ordinary sequential process and a communication process. The method uses parameterized pre- and post-conditions, and takes into account...
This paper focuses on data structures for multi-core reachability, which is a key component in model checking algorithms and other verification methods. A cornerstone of an efficient solution is the storage of visited states. In related work, static partitioning of the state space was combined with thread-local storage. This solution leaves room for improvements. This paper presents a solution with...
SystemC has become a very popular standardized language for the modeling of system-on-chip (SoC) devices. However, due to the ever increasing complexity of SoC designs, the ever longer simulation times affect SoC exploration potential and time-to-market. In order to reduce these times, we have developed a parallel SystemC kernel. Because the SystemC semantics require a high level of synchronization...
We introduce a network of processing elements, the cube-connected-cycles (CCC), complying with the present technological constraints of VLSI design. By combining the principles of parallelism and pipelining, the CCC can emulate the cube-connected machine with no significant degradation of performance but with a much more compact structure. We describe in detail how to program the CCC for efficiently...
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