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In this paper results of research of hardware amount in the logic circuit of the finite state machine (FSM) with datapath of transitions are shown. A research method is reduced to simulating structural blocks of the FSM using VHDL. There is investigated the efficiency of the FSM with datapath of transitions in comparison to the FSM with canonic structure.
This paper deals with embedded real-time (RT) simulators applied in power electronic applications and implemented in low-cost field-programmable gate arrays. Indeed, such simulators' intellectual properties (IPs) are not only intended for hardware-in-the-loop (HIL) testing but also can be advantageously embedded within digital controllers to ensure functions such as observation, estimation, diagnostic,...
High level synthesis using C/C++ code of applications is rapidly gaining ground. Code profiling has traditionally been used to select code blocks to implement in hardware by using ASICs, FPGAs or other programmable logic. We present a set of new hardware complexity metrics to reason about the suitability of a software function for its implementation by hardware synthesis. Our proposed metrics bring...
In the multiuser MIMO broadcast channel, the use of precoding techniques is required in order to detect the signal at the users' terminals without any cooperation between them. This contribution presents the design and hardware implementation of a high-capacity precoder based on vector perturbation. The most challenging part of the vector precoding (VP) scheme, that is, the search for the perturbing...
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