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RF antenna array beamforming based on electronically steerable wideband phased-array apertures find applications in communications, radar, imaging and microwave sensing. High-bandwidth requirements for wideband RF applications necessitate hundreds of MHz or GHz frame-rates for the digital array processor. A systolic architecture is proposed for the real-time implementation of the 2-D IIR beam filter...
To reduce the excessive amount of computation of traditional motion estimation (ME) algorithm, the diagonal match criterion (DMC) was proposed. DMC brings 75% reduction of computation Complexity and just 2.08% reduction of performance (PSNR) compare with traditional ME algorithm. What’s more important is that beside low, the performance reduction is very stable. And this makes DMC a valuable criterion...
This paper presents the design of a dynamic reconfigurable processor using an array of two dimensional logarithmic numbering system (LNS) processing elements and registers. By programming the processor, the array configures dynamically during operation and executes the required task with different structures in each phase. The proposed coarse grain array architecture is suitable for implementation...
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