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Image and video processing algorithms implemented in software, require most computation time when the image size is increased. Also, some algorithms must be processed at high-speed, for example the image thresholding algorithms for high throughput real-time applications. Then, in order to overcome this requirement, the algorithms must be efficiently implemented in hardware. In this paper, we present...
Gauss-Jordan Elimination (GJE) is a popular method for solving systems of linear equations. Much work has been done to design high throughput, low cost, FPGA-based architectures for GJE. However, as the interest in energy efficient designs increases, power consumption becomes a prevalent metric that must be considered in any FPGA-based implementation. In this paper, we present a scalable architecture...
This paper develops pipeline architecture of particle swarm optimization with random time-varying inertia weight and acceleration coefficients (PSO-RTVIWAC) based on existing serial architecture. The proposed architecture incorporated two features to reduce calculation error and keep high speed calculation with acceptable chip area cost. First, actual hardware design is simplified. Then the pipeline...
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