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RF CMOS technology provides a platform for the production of analog, digital and RF circuits on a single chip for futuristic high-level integration. This facilitates the need for a robust compact model for RF FinFETs to study the circuits in a precise and convenient way. In this paper, we have characterized 14-nm N-channel bulk FinFETs by performing two-port S-parameter measurements. Further, BSIM-CMG...
Power amplifier (PA) behaviour modelling is a crucial technique for the improvement of telecommunication systems because it constitutes the core of a linearisation circuit that allows for the amplifier to develop high efficiencies at the same time that it delivers a linear output signal to the load. Polynomial filters can be used in order to represent both the non-linearities of the PA and the memory...
In this paper, we analyze the performance of a time-slotted multi-antenna wireless powered communication (WPC) system, where a wireless device first harvests radio frequency (RF) energy from a power station (PS) in the downlink to facilitate information transfer to an information receiving station (IRS) in the uplink. The main goal of this paper is to provide insights and guidelines for the design...
To: (i) reduce the power consumption in digital integrated circuits, (ii) increase the transistor trans-conductance generation efficiency in analog circuits, and (iii) attain a very sensitive nonlinear response to RF, transistors exhibiting very steep room-temperature subthreshold slope (SS) are required. The subthreshold slope of conventional MOSFETs is limited to >60mV/dec due to their current...
Passive components play a key role on the design of RF CMOS integrated circuits. Their synthesis, however, is still an unsolved problem due to the lack of accurate analytical models that can replace the computationally expensive electromagnetic simulations (EM). Both, physical-based and surrogate models have been reported that fail to accurately model the complete design space of inductors. Surrogate-assisted...
Growing demand for more powerful yet smaller devices has resulted in continuous scaling of fabrication technologies. While this approach supports aggressive design specifications, it has resulted in tighter constraints for circuit designers who face yield losses in analog / RF ICs due to process variation. Over the last few years, several statistical techniques have, therefore, been proposed to counter...
This paper presents non-EDA based design simulation using Simscape for graphene based nanoelectronic systems. The objective of this paper is to explore ultra-fast design for analog devices using substitutes to conventional but time intensive EDA simulations such as SPICE. A GFET behavioral model is presented where the model is based on the drift-diffusion conduction mechanism of the dual-gate device...
This paper is concerned with the development and evaluation of a number of modelling techniques which improve Qucs Harmonic Balance simulation performance of RF compact device models. Although Qucs supports conventional SPICE semiconductor device models, whose static current/voltage and dynamic charge characteristics exhibit second and higher order derivatives may not be continuous, there is no guarantee...
Traditional BSIM MOSFET model extraction considers I-V/C-V curve fitting to capture DC non-linearity and S-parameter fitting to capture high-frequency small-signal behavior. This leads to poor accuracy when modeling MOSFETs in large-signal RF circuits such as power amplifiers, which require to model high-frequency large-signal behavior of MOSFETs. In this paper, we proposed an automatic method for...
We extract the nonlinear model of a 0.15 μm GaAs pHEMT for cold-FET mixer applications. The model parameters are extracted from experimental data obtained by simultaneously driving the device under test with low-frequency large signals and a tickle tone at the RF operating frequency. The advantage of this approach is twofold. Firstly, as a result of a single measurement one can get separately the...
In this paper a method for obtaining a time domain behavioral model of a power amplifier from component manufacturer's data, enabling fast system level comparisons of various power amplifier designs is presented. The method uses a physics based approach for determining the model's memory effects with respect to input and output matching networks, bias networks and temperature. Additional component...
A simplified schematic is presented to implement fast and accurate space-mapping-based modeling and design. It can match a surrogate model with both fine model responses and approximated responses. The implementation allows us to study aspects of modeling, including sample selection, time cost and accuracy. A nominal design is obtained with selected models and verified through high-fidelity EM simulations...
This paper presents the characterization of intermodulation distortion in pnp SiGe HBTs on SOI. For the first time, measured results of pnp SiGe HBTs are compared against Spectre-based simulations using both HICUM and VBIC compact models, after the systematic selection of the appropriate corner models. It is shown that the HICUM model more accurately captures distortion effects than the VBIC model,...
How to model the power amplifier behavior accurately is the key to system-level simulation. BP neural network can be used to simulate random nonlinear system, but it easily falls into the local minimum points and has no enough precision. So, this article proposes two improved model based on BP neural network model, one is cascading model BP-RBF, and the other is PSO_BP neural network. Design amplifier...
This paper gives an overview of the SCERNE project, started in February 2008 for a duration of 3 years. The main objective is to allow significant advances in the CAD tools dedicated to RxTx radar chains. From circuit to system, a CAD platform gives a unified solution for efficient bottom-up analysis, allowing to extract advanced behavioral models of RF blocks, to use them in accurate DataFlow or...
This paper presents a methodology for determining the series resistance of (through-wafer interconnect) Vias directly from measured S-Parameters using an ultra-low impedance measurement known as the “S21-Shunt” technique. Data is acquired following on-wafer SOLT calibration using standard VNA / PNA hardware by characterizing “series-shunt” configured test structures. Measurement errors attributable...
GaN devices have significant advantages in power density, thermal characteristics, and voltage range over those based on conventional compound semiconductors or Silicon. With GaN, as in other materials systems there are significant advantages in cycle time and strength of design from use of TCAD. Here TCAD simulations of AlGaN/GaN HEMTs are shown to accurately match measured DC and small signal AC...
A tag simulator is a device that can exchange data with an RFID reader in the same way as a real transponder. It may be of help for reader developers in the process of testing the device response and adjusting the communication algorithms. It may equally help system integrators in testing and tuning the performance of the complete RFID system that comprises the readers, the network to which they are...
Modeling power amplifier is a key step for designing power amplifying system and predistortion system. Whether nonlinearity and memory effects of power amplifier can be modeled correctly or not, has an important impact on system simulation performance. This paper presented and analyzed the Radial Basis Functions Neural Network (RBFNN), Utilizing input and output data extracted from Freescale semiconductor...
Poly gate defined lateral ESD diodes were fabricated, characterized and modeled using Foundry standard 65nm CMOS technology. Compare to conventional STI diode, the lateral diode demonstrated superior Q-factor and TLP IT2 due to the reduced transport distance and RC constant. Aided by BSIM4 MOS transistor model, a physically based scalable lateral diode model was developed and presented here for the...
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