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Many techniques have been developed to accelerate micro-architecture simulation since it is becoming increasingly urgent as the complexity of workloads and simulated processors increases. However, most of popular techniques need profiles or trial simulations to determine parameters before real simulations. When the number of dynamic instructions of workloads such as SPEC CPU2006 is huge, the profiles...
This paper quantitatively studies the trace effects to the performance and accuracy of the BigSim Emulator, a scalable parallel emulator for large-scale computers. To assess the accuracy effect we modify the emulator code to collect the predicted computation time. Four MPI programs with different computation to communication ratios are used as benchmarks. The emulation time and the predicted computation...
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