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Programmable hardware devices, specifically FPGAs, are increasingly being used in critical applications. State-of-the-art devices use SRAM memory for configuration purposes, which is very sensitive to faults. Previous studies have shown that, the vast majority of the generated errors have a high latency, and that some failures are due to the accumulation of errors. To overcome these threats, manufacturers,...
This work describes methodology for implementation of high-performance synthetic heat generators within the FPGA fabric. The proposed design flow is compatible with vendor tools and the generated synthetic heat generators can be seamlessly integrated with existing designs. Various architectures of synchronous and asynchronous heaters are evaluated in terms of their efficacy and dynamic range. We provide...
To get rid of the heavy burden of aspect ratio tuning, bias adjustment and porting problem among processes in full-custom or mixed-mode design, a fully digital smart temperature sensor realizable with 140 field programmable gate array (FPGA) logic elements was proposed for painless VLSI on-chip integrations. By simply replacing the cyclic delay line with a retriggerable ring oscillator for accuracy...
Heat emission and temperature control in an electronic device is known to be highly correlated to power consumption as well as to equipment's reliability. Within this context, this paper discusses a possible solution to restrict processing component's heat emission in FPGA-based system (e.g., Cognitive Radio (CR) equipment). It also describes the implementation, on reconfigurable FPGA based circuit,...
The aim of this paper is to present a new methodology and the tools used to predict and control the FPGA Device Heat before starting the design. Knowing that the FPGA silicon heat is crucial as they all have a temperature above and under which their functionalities is not longer guaranteed. The silicon temperature is linked to the different options and strategies used to implement the design. Many...
In deep submicron era, to prevent larger amount of SRAM from more frequently encountered overheating problems and react accordingly for each possible hotspots, multiple ideal run-time temperature sensors must be closely located and response rapidly to secure system reliability while maintaining core frequency. This paper presented a method to extract run-time temperature information from multiple...
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