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This paper introduces a novel method to identify each individual delay in Multiple Input Multiple Output linear systems with unknown delays. The solution is based on a multi-model scheme consisting of a set of tentative delay estimations along with a switching mechanism aimed at progressively updating them through time according to a figure of merit. Moreover, the set of tentative delays is proved...
We study a performance improvement technique for the IEEE 1588 time synchronization system for Ethernet mobile backhaul. We propose and demonstrate the queuing delay estimation method by using dedicated probing packets to mitigate time synchronization deterioration caused by queuing delay in a packet switch. The demonstration results by numerical simulation show that the proposed method is effective...
Using exact switching activity rates at all internal nodes when calculating energy of digital circuits is believed to result in improved accuracy over to the use of average switching activity.We compare the two approaches in the case of the Kogge-Stone adder implemented with Weinberger and Ling addition recurrences. The difference between the two is less than 4%.Further we examined the accuracy of...
Current mode (CM) scheme provides suitable alternative for the high speed on-chip interconnect signaling. This paper presents a energy-delay optimization methodology for the current-mode (CM) signaling scheme. Optimization for the CM circuits for on-chip interconnects requires a joint optimization of driver and receiver device sizes, as their parameters which affect the energy-delay performance depend...
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