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The growth in field-programmable gate array (FPGA) capacity has outpaced improvements in serial processor speeds for the last decade and will continue for the foreseeable future. Unfortunately, as modern FPGAs have millions of logic elements and continue to grow, the compilation of designs can take hours or even days to complete. As a result, the runtimes of placement and routing flow have become...
In order to accelerate logic simulation, it is highly beneficial to simulate the circuit design on FPGA hardware. This is often referred to as emulation, and we use the terms simulation and emulation interchangeably in this paper. However, limited hardware on FPGAs prevents large designs from being implemented on a single FPGA. Hence there is a need to partition the design and simulate it on a multi-FPGA...
Datasets of tens of gigabytes are becoming common in computational and experimental science. Providing remote visualization of these large datasets with adequate levels of quality and interactivity is an extremely challenging task, particularly for scientists who collaborate in widely distributed locations and their primary access to visualization resources is a desktop computer. This paper describes...
Linear-time for Linear Programming in R2 and R3 are presented. The methods used are applicable for some other problems. For example, a linear-time algorithm is given for the classical problem of finding the smallest circle enclosing n given points in the plane. This disproves a conjecture by Shamos and Hoey that this problem requires Ω(n log n) time. An immediate consequence of the main result is...
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