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When learning different control related concepts and methods, simulation is often used as a training tool; but, it does not have some real time characteristics of implementation like dealing with coding and PC resources, supervision, and communications. In some cases, implementation cannot be carried away, since it involves hardware design and is expensive. The proposed solution in this paper involves...
In this paper, we propose a high accuracy multi-chain time interval measurement (TIM) technique by employing the dedicated carry chain of FPGA. According to the principle of delay chain time to digital converter (TDC), the proposed method is realized by connecting the selectors inside the slices. The resolution of the delay chain method is limited by the time delay of one delay unit. To break through...
Standardization bodies such as IEEE and 3GPP, as well as other interest groups, are in the process of defining and standardizing different functional subdivisions within mobile network base stations, primarily to reduce the data rate requirements imposed on the transport architecture by 4th and 5th generation mobile systems. Ethernet is considered the leading candidate for the transport architecture...
Datacenter networks are becoming crucial foundations for our information technology based society. However, commercial datacenter infrastructure is often unavailable to researchers for conducting experiments. In this work, we therefore elaborate on the possibility of combining commercial hardware and simulation to illustrate the scalability and performance of datacenter networks. We simulate a Datacenter...
A standard priority-queuing system is capable of arranging packets with different traffic classes to guarantee a relatively low latency for the high priority traffic. However, in practical cases, severe delay may be caused by starting a large, low-priority frame ahead of a time-critical frame. In this paper, interspersed express traffic is evaluated, which enables preemption of non-time-critical transmission,...
This article presents a model library of generic components to build virtual Avionics Full Duplex Switched Ethernet (AFDX) networks. The presented library is a blockset for MATLAB/Simulink. The functional behavior of the simulation library's basic building blocks represent the scheduling and routing in AFDX end systems and switches on frame level. The graphical nature of Simulink allows to model AFDX...
To cope with data collision problem in consensus synchronization algorithm caused by utilizing pseudo-periodic broadcast method, this paper presents a novel gossip averaging based clock synchronization protocol, which combines the a synchronism of rumor communication and the robustness of neighbor averaging. We design a randomized link-activated based relative skew estimation strategy, which realizes...
Cloud computing uses internet data centers to host applications and data storage. Cloud computing resources and services are offered to customers on pay-per-use model while the quality of the offered resources and services are defined using service level agreements also known as SLAs. Unfortunately, there is no standard mechanism to verify and assure that services delivered by the cloud provider satisfy...
The aim of this paper is to design multiplier circuits for artificial neural network applications. The efficient use of area and speed performance has become a challenging task VLSI design field. In this works, radix-4 booth multiplier and radix-2 booth multiplier algorithms are analyzed based on its area used and speed performance. The less area used means the multiplier is more efficient in usage...
This manuscript provides a novel method to improve occupied area, speed and power consumption of Infinite Impulse Response (IIR) decimation filter. The filter is design using proposed Merged Delay Transformed (MDT). First, mathematical calculation is performed and then applied effectively to first- and second-order IIR filters. The performance of the proposed design is compared with the exiting polyphase...
Floating-point arithmetic is ever-present in computer systems. All most all computer languages has supports a floating-point number types. Most of the computer compilers called upon floating-point algorithms from time to time for execution of the floating-point arithmetic operations and every operating system must be react virtually for floating-point exceptions like underflow and overflow. The double-precision...
Multicore instruction-set simulation (MCISS) has become more and more important due to tremendous increase in number of multicore designs. To boost the speed of MCISS, one of the most effective and commonly used approaches is parallel simulation. However, timing synchronization must be applied to ensure accurate simulation results of parallel MCISS, and may induce huge synchronization overhead. In...
Commodity hardware can be used to build a software router that is capable of high-speed packet processing while being programmable and extensible. Therefore, software routers provide a cost-efficient alternative to expensive, special hardware routers. The efficiency of packet processing in resource-constrained nodes (e.g. software routers) can be strongly increased through parallel processing with...
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