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The high number of cells employed in a Modular Multilevel Converter represents a challenge for the control hardware. Some authors have proposed the use of digital communications to simplify the assemblage and maintenance in such converters, but the latency they add has undesirable consequences for the closed-loop performance. In this paper, we propose a model-based compensation of the latency that...
The design of high-performance adders has experienced a renewed interest in the last few years; among high performance schemes, parallel prefix adders constitute an important class. They require a logarithmic number of stages and are typically realized using AND-OR logic; moreover with the emergence of new device technologies based on majority logic, new and improved adder designs are possible. However,...
Cellular Automata with Random Memory (CARM), which has been recently introduced, is a time-delay discrete time system such that delay is a random variable. Delay in discrete time systems can be easily generated from a random delay characteristics of wires and transistors in programmable logic devices. Therefore implementation of CARM model is not required any special hardware. In this paper, a new...
A standard priority-queuing system is capable of arranging packets with different traffic classes to guarantee a relatively low latency for the high priority traffic. However, in practical cases, severe delay may be caused by starting a large, low-priority frame ahead of a time-critical frame. In this paper, interspersed express traffic is evaluated, which enables preemption of non-time-critical transmission,...
A pair of 32 bit Gaussian Random Numbers (GRaNs) is generated. Box Muller (BM) transformation is widely used for generation of high quality Gaussian Random Numbers in hardware. The BM transformation is a direct method to convert random numbers into a Gaussian random numbers. For the generation of uniform random number skip-ahead linear feedback shift register (SA-LFSR) is used which is given as input...
In this paper, we design and implement an asynchronous multi-device acoustic localization system. Although the relative position and distance can be useful to many applications such as drone swarming, not much research has been conducted on the field. As synchronizing multiple devices can be difficult or even impossible with certain hardware, we devised an asynchronous algorithm that provides a high...
Memristors are non-volatile memory elements. In applications like mem-computing, where memory acts both as a site for storing data and logic computations, memristors provide promising future. In this paper, the design of adders implemented with memristors is discussed. Memristor based designs for standard fixed point adder architectures (ripple carry adder, carry look-ahead adder and parallel prefix...
The first ASIC-based Gauss error function (GEF) module is proposed and fabricated in SMIC 180-nm process in this paper. A novel method is proposed to be used in the design. Experimental results show that compared with the design based on Taylor expansion method, the proposed design decreases the absolute error by 99.21%, reduces the area by 77.21% and reduces the delay by 11.96%. It can be used as...
In this paper, an efficient lifting based discrete wavelet transform (DWT) architecture using flipping scheme is presented. The proposed design consists of simplified control path with efficient hardware structure. The architecture is designed for images with size of 256×256. A co-simulation methodology is followed, image reading and writing is done by MATLAB while analysis and processing is done...
It's known that most of the audio sources tracking techniques are complicated as they require high degree of computations and considerable long real time processing. As a result of this, only certain hardware architectures can meet these application requirements. This work is assessing a previously presented source detection algorithm which meant to be adaptive in real time spectrum searching targeting...
We consider a Machine-to-Machine (M2M) network where a large number of user nodes (STAs) communicate with a Data Collector (DC). We consider the case where all the user nodes periodically transmit their data packets to the DC and the network is in saturation. Recently protocols based on Frame Slotted Aloha (FSA) have been shown to be suitable as MAC protocols for M2M data collection networks under...
There are many engineering simulations and scientific computing applications where large linear system of equations are to be solved. With the generous development in scientific computing the use of large linear system of equations also increases. There are many solvers for solving these equations. Jacobi is one of the important solvers for solving linear system of equations. Jacobi method is more...
This paper presents an application by integrating theories through an experimental setup. In the literature it is found that, researchers designs advanced controllers and presents only simulation results. The motivation here is in-house design and fabrication of level setup and understands the practical difficulties in the real time implementation of software based controllers. They are easy for programming,...
Embedded systems (ES) based on field programmable gate arrays (FPGAs) enhance the overall computational capability and relieve computational load. The lack on design and implementation methods for specific control functions in hardware limits the application of complex control techniques. Therefore, a design methodology approach is showed in the current work. Fuzzy, LQR, and PI control systems are...
A Sliding Mode Control (SMC) is modified in order to address the input delay in the control of quadrotor educational platform. The proposed scheme uses a predictor that compensates the delay effect on the input control which can appear for example when the control law is computed in a ground station. A Lyapunov stability analysis is presented to prove the exponential closed-loop stability in presence...
This paper presents performance analysis for hardware Thread-Level Speculation (TLS) in the IBM Blue Gene/Q computer. Unlike traditional multi-thread programming model which uses lock to ensure the consistency of shared data, TLS is a harware mechanism to detect and resolve memory access conflicts among threads. The model shows good performance prediction, as verified by the experiments. This study...
Due to the rapid growth of Call Center Companies, alternatives for balancing calls between multiple servers where the agents are connected (ACD1 servers), and that allow the increase of the operation capacity without compromising the performance and quality of service are needed. Currently, load balancing algorithms usually address the problem for a set of geographically separated Call Centers (VCC:...
The popularity of multimedia services offered over the Internet have increased tremendously during the last decade. The technologies that are used to deliver these services are evolving at a rapidly increasing pace. However, new technologies often demand updating the dedicated hardware (e.g., transcoders) that is required to deliver the services. Currently, these updates require installing the physical...
A Hardware Trojan is a malicious hardware modification of an integrated circuit. It could be inserted at different design steps but also during the process fabrication of the target. Due to the damages that can be caused, detection of these alterations has become a major concern. In this paper, we propose a new resilient method to detect Hardware Trojan based on path delay measurements. First, an...
This paper presents a unified logic for flagged prefix addition-subtraction that eliminates the need to perform constant addition and subtraction in two separate blocks. The logic is based on a modified algorithm for constant subtraction that allows us to achieve the unification which is not possible with traditional algorithms. Thus we are able to eliminate the most crucial challenge that practical...
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