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This paper presents principles and results of dynamic testing of an SRAM-based FPGA using time- resolved fault injection with a pulsed laser. The synchronization setup and experimental procedure are detailed. Fault injection results obtained with a DES crypto-core application implemented on a Xilinx Virtex II are discussed.
Timing-error detection and recovery circuits are implemented in a 65 nm resilient circuit test-chip to eliminate the clock frequency guardband from dynamic supply voltage (VCC) and temperature variations as well as to exploit path-activation probabilities for maximizing throughput. Two error-detection sequential (EDS) circuits are introduced to preserve the timing-error detection capability of previous...
Either as a significant augmentation of GPS system, or as an independent system for indoor positioning, pseudolites augmenting GPS technique has become an exciting technology whose potential can be explored for a wide range of positioning and navigation application. Indoor positioning using multiple pseudolites signals, however, comes up against a number of obstacles, and there are some challenging...
In this paper we discuss the use cases for monitoring of Web services for compliance with policies and service level agreements. In particular, the quality of service associated with Web service interactions and its monitoring rely on the proper use by both parties of related Web service protocols. This monitoring is best served by an event-centric model and an extensible scripting language, such...
A special round robin (RR) algorithm has been developed to equalize nickel metal hydride (NiMH) battery packs using a new selective equalizer. This algorithm detects batteries either at a very low state of charge (SOC) or at an extremely high SOC. In this system, a set of electromechanical relays are connected in a matrix to route boost current to the weaker batteries. The relay switching is controlled...
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