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As fault-tolerant Networks-on-Chip (NoCs) become prevalent in reliable systems, their overhead must be accurately evaluated. In this paper, we evaluate the overhead of a soft error resilient real-time NoC router for ASICs in terms of area and power. We employ a power analysis framework and load profiles that provide accurate power figures. Furthermore, we analyze the power behavior in normal operation...
This paper deals with a review of research works which have been recently carried out on the topic of real-time fault diagnosis of electromechanical systems. The proposed approaches rely mainly on the implementation of fault diagnosis algorithms in digital signal processors and field programmable gate arrays as well as usage of real-time simulators applied formerly in the context of hardware-in-the-loop...
This paper focuses on FPGA for realtime applications and proposes a redundant configuration scheme with rejuvenation on a dual-FPGA architecture to handle SEUs. Duplication check is utilized to detect errors within the FPGAs. Rollback and re-computation will be attempted when the error is detected. If the error remains, the rejuvenation will be triggered. The proposed architecture consists of two...
An autonomous fault-tolerant system (AFTS) is one that can reconfigure its own resources in the presence of permanent defects and spontaneous random faults occurring in its silicon substrate in order to maintain the original functionality. This capability makes an AFTS especially suitable for use in harsh environments, where traditional electronics technology is susceptible to failure. This article...
Onboard Reconfigurable Processing Platform (ORPP), which mainly consists of reconfigurable devices (FPGAs) and auxiliary co-processors such as DSPs, is dedicated to in-situ real-time computing for various space missions. Harsh ionizing radiation effects have been observed during flight thus make it crucial to design fault tolerance in ORPPs. Transient available refers to ORPP can mask transient faults...
Current FPGA architectures are limited in the area of granular reconfiguration. This is largely due to the limited use of reconfigurable designs and the focus on reconfiguring entire modules as opposed to fine details of a design. The ability to reconfigure a circuits' characteristics can have huge rewards in the areas of circuit survivability, fault tolerance and anti tamper. This paper addresses...
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