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This paper presents a 22 to 26.5 Gb/s optical receiver with an all-digital clock and data recovery (AD-CDR) fabricated in a 65 nm CMOS process. The receiver consists of an optical front-end and a half-rate bang-bang clock and data recovery circuit. The optical front-end achieves low power consumption by using inverter-based amplifiers and realizes sufficient bandwidth by applying several bandwidth...
This paper presents a 26.5 Gb/s optical receiver with an all-digital CDR (ADCDR) fabricated in a 65 nm CMOS process. The receiver consists of a transimpedance amplifier (TIA), a limiting amplifier (LA), and a half-rate ADCDR. The TIA and LA are based on an inverter-based amplifier for low power consumption. The ADCDR adopts an LC quadrature digitally controlled oscillator (LC-QDCO) for the quadrature...
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