The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
On the hardware platform of Distributed Real-Time Simulation, a communication module based on reflective memory network was realized in FPGA. The module, as an infrastructure, could be integrated with others seamlessly. Information stream inside the module was analyzed. Following the "Store and Forward with FIFO" rules, hardware circuits were well designed, including Host Logic, Memory Logic,...
On the hardware platform of Distributed Real-Time Simulation, a communication module based on reflective memory network was realized in FPGA. As an infrastructure module, it could be integrated with other modules seamlessly. Under the speed-first rules, DMA engine in PCI Master mode was designed, and 64bits/32bits bus compatibility was realized. In order to solve the competition problems during network...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.