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A novel 2.2-GHz-band ultra-low-voltage Class-C PMOS VCO IC with negative reference and amplitude feedback loop is proposed. The negative reference initially adapts a sufficient bias for the LC-VCO circuit to ensure a robust oscillation start-up. The feedback loop then adaptively controls the bias condition of LC-VCO for Class-C operation in steady-state. The reliability of the feedback loop is enhanced...
A design and simulations methodology that detects and compensates for NMOS and PMOS transistor resistance variation is presented. The proposed methodology provides a robust mechanism to match the transmitter impedance to the line impedance which minimizes reflection and improves signal quality. A mixed signal approach, where an analog circuit detects the resistance variation, and a digital circuit...
This paper presents a simple circuit technique to reduce gain variability with temperature in cascode amplifiers using a body-biasing scheme, and at the same time, enhance the overall gain of the amplifier. Simulation results of a standard telescopic-cascode amplifier, in two different nanoscale CMOS technologies (130 nm and 65 nm) show that it is possible to obtain supply-and-temperature-compensation...
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