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Reconfigurable hardware is now used in high performance computers, introducing the high performance reconfigurable computing. Dynamic hardware allows processors to devolve intensive computations to dedicated hardware circuitry optimized for that purpose. Our aim is to make larger use of hardware capabilities by pooling the hardware and software computations resources in a unified design in order to...
Small cell base stations (BSs) that form an overlay layer on the existing macrocell network offer tremendous potential in terms of satisfying high data rate traffic requirements and enabling breakthrough services. However; small cell deployments can pose negative energy-efficiency implications if not equipped with advanced power saving mechanisms. In this work, we address this issue and propose algorithms...
A novel cell architecture based on Distributed Antenna Arrays for next generation mobile WiMAX systems is proposed. By exploiting Spatial Multiplexing and beamforming techniques, our target is to maximize the throughput of a high speed user by keeping low the deployment costs. Radio over Fiber is one of the best solutions to feed from a central point distributed arrays and share wireless resources...
Based on a survey on the technical challenges to the future radio access network beyond LTA-Advanced, which should offer very high average areal throughput to support a vast amount of data traffic and user density with energy-efficient operation, we discuss the potential techniques and propose an overall framework.
In the multi-cell environment, the approaches that are suitable for the single cell scenario may cause excessive interference to other cells and become suboptimal. In this paper, we present a number of receiver-centric power allocation schemes that take into account the detrimental impact of allocated resources to the neighboring cells, and use it as a guideline in determining the appropriate power...
We study a cognitive channel reuse approach for autonomous femtocell deployment in an OFDMA-based cellular network. The objective is to manage the uplink interference from macrocell users to femtocell access points. Macrocell users are normally far away from the base station and may cause strong uplink interference to the close-by femtocells. By cognitive interference recognition, a femtocell access...
Stem cell therapy is considered a leading field of research worldwide, attracting a stunning amount of clinical applications, given its promising potential for recovery or replacement of tissues and organs. The idea of combining principles from cell biology and engineering of biocompatible materials in order to create biologic replacement structures that restore, maintain, or improve tissue function,...
Network processors have exploited many aspects of architecture design, such as employing multi-core, multi-threading and hardware accelerator, to support both the ever-increasing line rates and the higher complexity of network applications. Micro-architectural techniques like superscalar, deep pipeline and speculative execution provide an excellent method of improving performance without limiting...
Biological processes in organisms are driven by the genetic code represented by sequences of DNA. Every cell of a multi-cellular organism contains the full genome; however the gene activations differ based on a variety of factors at varying parts of the organism. The genetic code can be seen as an omni-functional code that is primarily function-agnostic, but triggers its relevant and required genes...
Enterprise architecture (EA) has become an important means to acquire and maintain knowledge about the structure and behavior of the enterprises and to develop the required IT systems. Two main goals in architecture - high flexibility and low complexity- are addressed in a new architectural style called service oriented architecture (SOA). In this paper, we discuss approaches to have SOA models in...
The cellular Potts model (CPM) has been widely used for biological simulations. However, most of current implementations are either sequential or approximate, which cannot be used for large scale complex 3D simulation. In this paper we present a hybrid parallel framework for CPM simulations. The time-consuming partial differential equation (PDE) solving, cell division, and cell reaction operation...
High performance computing (HPC) by parallel computing effort faces several challenges. The first challenge is the efficient design and management of the parallel computing resources of the hardware platform. The second challenge is the transformation of the sequential program meant for classic Von Neumann architecture to explicit parallel instruction computing (EPIC) architecture. The third challenge...
In modern superscalar processor, branch misprediction penalty becomes a critical factor in overall processor performance. Previous researches proposed dual (or multi) path execution methods attempt to reduce the misprediction penalty, but these methods are quite complex and high power consumption. Most of the reasons are due to simultaneously fetching and executing instructions from multiple. In this...
We propose process variation tolerant circuit techniques for robust digital subthreshold logic and memory for ultralow power sensor nodes. Based on the concepts developed in this paper, we present an 8??8 process-tolerant FIR filter, working in both superthreshold and subthreshold regions featuring adaptive ??-ratio modulation and integrated level converters. Ultra-dynamic voltage scaling (UVDS) enables...
The efficiency of fused multiply add units plays a key role in the processor's performance for a variety of applications. A design keeping the advantages of the FMA regarding the latency and the hardware utilization and also improving the result's accuracy in both normalized and denormalized numbers is the subject of this work. The FMA unit has configurable latency and it is integrated in a VLIW processor...
The design and simulation of a novel CMOS voltage mode parallel circuit is described. The circuit employs additional inhibitory and local excitory feedback based on a common voltage computation and this improves both speed and precision drastically. As a result, a single stage cell provides better resolution and speed in comparison to previous works. where cascading is necessary in to improve resolution...
A very compact and flexible single stage RF front-end for low power receiver is presented. The key feature of the circuit proposed is the large separation of the different functions implemented (RF amplification, mixing, LO and quadrature generation) even while sharing the same bias current and the same devices. Two different prototypes are reported. The first one is a RF front-end for GPS applications...
With a limited number of pre-constructed gates available, current standard cell libraries are not well equipped to take full advantage of advances in deep submicron technology by implementing functions as complex gates. As reported, in a technology process capable of supporting five serial MOS devices, 425,803 unique complex gates may be created - clearly much higher than what is currently available...
Experimental condition of thin SAB Oxide around 350Aring coupling with 400Aring Contact SiON film has exhibited the worst data retention behavior in One Time Programmable (OTP) & Multiple Time Programmable (MTP) memory device. Another alternative solution has been explored to improve the data retention characteristic by replacing the 400Aring silicon oxynitride (SiON) contact stopper with 300Aring...
Distributed generation (DG) from wind power becomes increasingly popular worldwide. However, the connection of large wind DGs onto existing radial distribution feeders cause challenges on proper operations of both DGs and their connected feeders. This paper proposes a new Network-enabled Adaptive Protection and Control (NAPC) strategy for properly interfacing wind DGs into distribution grids. The...
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