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This paper deals with the fault propagation and reliability of large-scale circuit and attempts to provide effective information for fault diagnosing. We analyse sample circuits from IBM benchmark suit by constructing directional weighting networks and modeling fault propagation. Roles of circuit network parameters are investigated and reliability analysis is given. The result from this work clearly...
On-time circuit fault diagnosis is very important. This paper offers a new algorithm of fault recognition knowledge acquisition based on simulation evolutionary algorithm. This algorithm is efficient to locate and recognize fault. The simulation result has proved the feasibility and efficiency of this algorithm.
In earlier, Fault Analysis (FA) has been exploited for several aspects of analog and digital testing. These include, test development, Design for Test (DFT) schemes qualification, and fault grading. Higher quality fault analysis will reduce the number of defective chips that slip past the tests and end up in customer's systems. This is commonly referred to as defective parts per million (DPM) that...
The Integrated Learning Method (ILM) uses multiple learners to solve the same problem, which can greatly improve the generalization ability of learning systems. To address the fault diagnosis on analog circuits, aiming at the shortcomings of diagnosis and model stability with single RBF neural network to diagnose faults of analog circuit system, the paper discussed method to improve model diagnosis...
In this paper, we have introduced a new technique based on simultaneous analysis of output voltage gain vs. frequency and phase vs. frequency for fault testing of analog integrated circuits. An automated test frequency generation method is demonstrated here to select minimum number of test frequencies as stimuli. The introduced technique is applied to three benchmark circuits and the obtained results...
Development in electrical power transmission system requires the use of circuit breakers with increasing breaking capacity. At present circuit breakers are to be installed on 245 kV to 1100 kV power system with short circuit ratings up to 120 kA. To test high voltage CBs, direct testing using the power system or short circuit alternators are not feasible. The testing of high voltage CBs of larger...
This paper presents an intrinsically verifiable library of quasi delay insensitive asynchronous templates providing an efficient debugging platform for large asynchronous circuits. We proposed using state transition graph to determining necessary properties which must be checked. For every template of a pre-charged full buffer library, we defined PSL properties which are used as monitors verifying...
The paper presents a test calculation principle which serves for producing tests of transistor-level faults in CMOS digital circuits. The considered fault model includes stuck-at-0/1 logic faults on the connecting control lines, as well as switch faults in the transistors. Both single and multiple faults are included. The transistor faults manifest themselves in stuck open (open circuit) and stuck...
The field of power electronics poses challenging control problems that cannot be treated in a complete manner using traditional modeling and controller design approaches for the reason that power devices are typical hybrid systems in nature. The power devices become more and more complex for the tendency to be interconnected and large scale. It is very important to detect symptom in the early of large...
A fault diagnosis approach of protective switching device (PSD) is presented in this paper. The support vector machines (SVM) which is a new kind of fault diagnosis methods is used to classify the faults including short circuit, overload, ..., etc. By training and learning, the fault model is built, the faults are diagnosed quickly and exactly, and accordingly the protection feature of PSD is improved.
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