The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
This paper investigates and compares the performance of different scheduling techniques in an Ethernet fronthaul network in the presence of both time-sensitive/high priority and background traffic streams. A switched Ethernet architecture is used as the fronthaul section of a cloud radio access network (C-RAN) and a comparison of two scheduling schemes, strict priority scheduling and time-aware shaping,...
Along with the development of industrial systems, real-time Ethernet (RTE) is widely utilized for control systems. S-TDMA is one of the RTE protocols, and it is a concept realizing a coexistence of real-time and best-effort communication over the Ethernet by time-division multiplexing. In previous work, a special switching hub capable of S-TDMA was implemented, and the capability of real-time communication...
Cyber-Physical Production Systems are characterized by integrating sensors, processing and communication in Industrial Environments like in advanced manufacturing plants or in the new generation Smart Grids. In these context, the accuracy on the synchronization plays a vital role because it is the base for control operations and for the correlation among the distributed sensor data sampling. In this...
In this paper an architecture for High-Availability Cyber-Physical Production Systems with sub-microsecond synchronization capabilities is presented. The proposed CPPS nodes are based on cost-affordable components. These CPPS can deal with most of the challenges set by Industry for a massive adoption of the distributed computing philosophy in critical systems like Smart-Grids or Advanced Manufacturing...
IEEE 1588 is a promising way of time synchronization in control systems that include IT. Intermediate devices such as network switches are needed when the control systems are built on a multi-hop network for wide area operations. However, the introduction of switches causes conflicts between the reply packets from the devices in a switch, and thus, the delays on the backward and forward paths would...
There is an increasing need of synchronization and clock frequency distribution in core and access networks. Synchronous Ethernet (SyncE) is a technology that is able to distribute clock frequency over Ethernet networks, while keeping scalability and reduced costs. Software-Defined Networking (SDN) is another emerging technology that is changing the landscape of network management by separating the...
Traditional distributed embedded systems are configured using static environment information and thus do not support dynamic behavior of the system. The necessary flexibility in the system may be provided by the Flexible Time-Triggered (FTT) communication paradigm. If, in addition, it is required that the system operates continuously, the suitable fault tolerance mechanisms that provide high reliability...
Predictable and guaranteed response is an essential characteristic of safety-critical real-time systems. Thus we need to guarantee that the end-to-end latency of data exchange within such a system is always bounded and controlled, so that the overall system behavior is predictable and safe. In this paper, we propose a method for determining the worst-case delay when a packet traverses a network that...
IEEE 1588v2 has emerged as the prime candidate for synchronization of PSN (Packet Switched Network). It is an asynchronous protocol and operates on master-slave hierarchy. Telecom profile of 1588v2 i.e. ITU G.8275.x is under standardization and discussions for various aspects are underway. Similarly MPLS has been adopted as core transport technology for present PSN. In this paper implementation of...
Asynchronous NoC switch is proposed as a robust design to mitigate the impact of process variation. Asynchronous and synchronous network on chip design are implemented to evaluate the impact of process variation on the network throughput. Network on chip interconnects and clock distribution network are considered under process variation with the advance in technology. The variation in logic and interconnect...
Since Infrastructure-as-a-Service (IaaS) clouds contain many vulnerable virtual machines (VMs), intrusion detection systems (IDSes) should be run for all the VMs. IDS offloading is promising for this purpose because it allows IaaS providers to run IDSes in the outside of VMs without any cooperation of the users. However, offloaded IDSes cannot continue to monitor their target VM when the VM is migrated...
Asynchronous NoC switch is proposed as a robust design to mitigate the impact of process variation. Circuit analysis is used to evaluate the influence of process variation on both synchronous and asynchronous designs. The delay and throughput variation are evaluated with different technologies. Although the asynchronous switch has large delay variation as compared to synchronous switch, high throughput...
This paper presents an FPGA based Ethernet cutthrough switch that is optimized for one-step PTP clock synchronization and fast forwarding of real-time Ethernet frames. Whereas a standard switch ASIC provides sophisticated mechanisms for switching of non-real-time frames, an attached FPGA implements cut-through switching of real-time frames and synchronization events. Moreover, timestamping of synchronization...
Collective operations, such as allreduce, are widely treated as the critical limiting factors in achieving high performance in massively parallel applications. Conventional host-based implementations, which introduce a large amount of point-to-point communications, are less efficient in large-scale systems. To address this issue, we propose a design of switch chip to accelerate collective operations,...
Serial RapidIO is a high-performance, packet-switched that was developed to address the embedded industry's need in term of faster bus speeds, increased bandwidth and reliability. Serial RapidIO allows chip-to-chip and onboard communications. In this paper, we present experimental results on performances optimizations of the Serial RapidIO interconnect integrated in the new digital signal processor...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.