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The origin of NBTI variability was investigated experimentally using the recovery by hydrogen annealing after NBT stressing. In the case of hydrogen-annealed devices after low voltage NBT stress, ΔVTH and ΔICP values including these distributions completely coincide with those in the case of the first NBT stress, irrespective the number of both the stress and the hydrogen annealing. This result indicates...
The PBTI is an important issue in the high-k dielectric nMOSFET devices in the present CMOS technology. In this paper, Random telegraph noise (RTN) technique was employed to investigate the stressed-induced traps and their correlation to the hot carrier and PBTI effects. It was found that the positions of stress-induced traps (SITs) are mostly located in the high-k layer, but not close to the high-k/SiO...
For several decades, the output from semiconductor manufacturers has been high volume products with process optimisation being continued throughout the lifetime of the product to ensure a satisfactory yield. However, product lifetimes are continually shrinking to keep pace with market demands. Furthermore there is an increase in dasiafoundrypsila business where product volumes are low; consequently...
Polarities of plasma charging damage in n- and p-channel MOSFETs with Hf-based high-k gate stack (HfAlOx/SiO2) were studied for two different plasma sources (Ar-and Cl-based gas mixtures), and found to depend on plasma conditions, in contrast to those with conventional SiO2. For Ar-plasma, which was confirmed to induce a larger charging damage, both n- and p-ch MOSFETs with high-k gate stacks suffer...
Continuous scaling, necessary for enhanced performance and cost reduction, has pushed existing CMOS materials much closer to their intrinsic reliability limits, forcing reliability engineers to get a better understanding of circuit failure. This requires that designers will have to be very careful with phenomena such as high current densities or voltage overshoots. In addition to the reliability issues,...
Plasma-exposed Si surface related to Si recess in source/drain region was investigated in detail for various superposed bias configurations with frequencies of 13.56 MHz and 400 kHz. Two different bias powers were utilized by an inductively coupled plasma reactor (ICP). The surface layer (SL) and the interfacial layer between the SL and Si substrate (IL) were analyzed by spectroscopic ellipsometry...
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