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Energy efficiency in high performance computing (HPC) systems is a relevant issue nowadays, which is approached from multiple edges and components (network, I/O, resource management, etc). HPC industry turned its focus towards embedded and low-power computational infrastructures (of RISC architecture processors) to improve energy efficiency, therefore, we use an ARM-based cluster, known as millicluster,...
Rewriting sequential programs to make use of multiple cores requires considerable effort. For many years, Amdahl’s law has served as a guideline to assess the performance benefits of parallel programs over sequential ones, but recent advances in multicore design introduced variability in the performance of the cores and motivated the reexamination of the underlying model. This paper extends Amdahl’s...
The paper proposes a formal verification process for reconfigurable Network-on-chip in MPSoC. The reconfiguration of the MPSoC can lead to the addition of messages that can create an overload on the NoC and violate the deadline of messages that have to be routed. We present an adaptive routing algorithm for this case able to adapt himself to this overload. When the NoC is no more able to support the...
Programming heterogeneous multiprocessor architectures is a real challenge dealing with a huge design space. Computer-aided design and development tools try to circumvent this issue by simplifying instantiation mechanisms. However, energy consumption is not well supported in most of these tools due to the difficulty to obtain fast and accurate power estimation. To this aim, this paper proposes and...
In the last decade, the scope of software optimizations expanded to encompass energy consumption on top of the classical runtime minimization objective. In that context, several optimizations have been developed to improve the software energy efficiency. However, these optimizations commonly rely on long profiling steps and are often implemented as unstable runtime systems, which limits their applicability...
In this paper, a novel scientific workflow simulator is designed and implemented which is energy-aware and can simulate the scientific workflow that running on the multi-core cluster system. A method for application modeling is proposed which can describe the process dependence, data dependence and performance requirement of the workflow. A computing system model was also introduced to describe the...
Energy efficiency and high system reliability are two primary measurement in modern high-performance computing. Most recent studies pay too much attention on low energy consumption or execution time for parallel tasks scheduling. In addition, these approaches are proposed for the classic scheduling model. It is increasing recognized that contention model is more realistic and be of benefit to create...
The power consumption of large-scale high performance computing (HPC) systems is becoming a crucial challenge in the context of increasing the performance regardless of energy consumption [1]. Therefore, finding ways to improve energy efficiency has become a main issue for HPC applications. Dynamic voltage and frequency scaling (DVFS) is a widely used and powerful technique for reducing energy consumption...
Future generation processors are expected to have high soft error rates and will require increased fault detection and fault tolerance. This work focuses on errors in execution units. Hardware or software duplication or triplication, parity, or residue codes could be used to detect errors in execution units. However, hardware duplication/triplication have significant area overhead and, in applications...
In the recent past, heterogeneous computing has gained popularity over the traditional homogeneous computing. Moreover, the upcoming processors are typically equipped with dynamic voltage and frequency scaling options to reduce energy consumption as per the application requirements. Scheduling plays a vital role for efficient parallel computing systems, and in this work, the relationship among heterogeneity,...
Design space exploration for ASIP instruction-set design is a very complex problem, involving a large set of architectural choices. Existing methods are usually handcrafted and time-consuming. In this paper, we propose and investigate a rapid method to estimate the energy consumption of candidate architectures for VLIW ASIP processors. The proposed method avoids the time-consuming simulation of the...
In distributed real-time systems, when resource cannot meet workload demand, some jobs have to be removed from further execution. The decision as to which job to remove directly influences the system computation efficiency, i.e., the ratio between computation contributed to successful completions of real-time jobs and total computation contributed to the execution of jobs that may or may not be completed...
The estimation and evaluation of the energy consumption of computers is becoming an important issue. In this article, we address the question how the energy consumption for computations can be captured by an analytical energy consumption model. In particular, we address the possibility to reduce the energy consumption by dynamic frequency scaling and model this energy reduction in the context of task...
We consider the problem of energy aware scheduling of a set of jobs on a set of unrelated parallel machines with the average weighted completion time plus energy objective. The processing time and the energy consumption of the jobs are machine and speed dependent. Also, every job is subject to a machine-dependent release date. Firstly, we aim to find a non-preemptive schedule of the jobs minimizing...
Programming models based on parallel modules provide portable efficiency on a large range of parallel platforms due to a flexible execution model for the modules. Today, energy efficiency is becoming equally important as execution time efficiency. This article investigates the execution of parallel module programs with respect to energy concerns. In particular, an analytical energy model is extended...
In the past few years, many energy-aware scheduling algorithms have been developed primarily using the dynamic voltage-frequency scaling (DVFS) capability which has been incorporated into recent commodity processors. However, these techniques are unsatisfied with optimizing both schedule length and energy consumption. Furthermore, most algorithms schedule tasks according to their average case execution...
Constant growth in demand for computational power requires advances in the internal mechanisms of multiprocessor computing structures. Such architectures may include many (sometimes, even millions of) processors performing processing tasks. Each technique that increases efficiency leads to significant benefits in operational energy and task execution time. Due the scale of multiprocessor computing...
In a heterogeneous environment, uncertainty in system parameters may cause performance features to degrade considerably. It then becomes necessary to design a system that is robust. Robustness can be defined as the degree to which a system can function in the presence of inputs different from those assumed. In this research, we focus on the design of robust static resource allocation heuristics suitable...
Contention on shared resources such as cache and main memory slows down the execution of the applications affecting not only application performance but also induces inefficient use of energy. Therefore, in this paper we deal with the contention problem and energy optimization on shared resources multicore-based machines. Our main contribution is a memory-aware resource allocation algorithm that minimize...
Tasks running on embedded systems are often associated with deadlines. While it is important to complete tasks before their associated deadlines, performance and energy consumption also play important roles in many usages of embedded systems. To address these issues, we explore the use of Dynamic Voltage and Frequency Scaling (DVFS), a standard feature available on many modern processors for embedded...
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