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This article proposes a modification of the standard Linux scheduler for a support of a reconfigurable heterogeneous multiprocessor system. The standard Linux scheduler is limited to a homogeneous multiprocessor system only. The addition of the processing core with a different feature requires modification of a decision algorithm of the scheduler as a heterogeneous task cannot be executed on any processing...
The article presents multiprocessor system on chip (MPSoC), which uses dynamic partial reconfiguration of FPGA (Field Programmable Gate Array) to change parts of system depending on performed task requirements. The multiprocessor system is based on softcore processors running modified GNU/Linux operating system. The individual parts are designed for connection via standard interface for high performance...
A virtualization layer makes it possible to compose multiple functionalities on a multi-core processor with minimum modifications of OS kernels and applications. A multi-core processor is a good candidate to compose various software independently developed for dedicated processors into one multi-core processor to reduce both the hardware and development cost. In this paper, we present SPUMONE, which...
Continuing improvements in the scale of many-core platforms are accompanied by increased asymmetry in their memory architectures. Such NUMA architectures, however, require systems software that understands this asymmetry to attain high levels of performance, leading to significant work in optimizing operating systems like Linux and Windows to increase locality of access to memory nodes and to consider...
Though with the rapid development, there remains a challenge on achieving high performance of I/O virtualization. The Para virtualized I/O driver domain model, used in Xen, provides several advantages including fault isolation, live migration, and hardware independence. However, the high CPU overhead of driver domain leads to low throughput for high bandwidth links. Direct I/O can achieve high performance...
In Recent years embedded world has been undergoing a shift from traditional single-core processors to processors with multiple cores. However, this shift poses a challenge of adapting legacy uniprocessor-oriented real-time operating system (RTOS) to exploit the capability of multi-core processor. In addition, some embedded systems are inevitably going towards the direction of integrating real-time...
The Petascale era has recently been ushered in and many researchers have already turned their attention to the challenges of exascale computing. To achieve petascale computing two broad approaches for kernels were taken, a lightweight approach embodied by IBM Blue Gene's CNK, and a more fullweight approach embodied by Cray's CNL. There are strengths and weaknesses to each approach. Examining the current...
This paper introduces a design of PC system for mobile robot based on ARM9. The hardware platform is S3C2440 from Samsung company as processor core, expanding 256MB Nand Flash, 2MB Nor Flash, 64MB SDRAM, etc. The software platform is embedded Linux operating system, and the design of the interface and the function of the system is based on Qt/Embedded of Linux. The software and hardware of the system...
Computer simulation has allowed the analysis of behavior and performance of systems still in its design phase. The Advanced Superscalar Simulator project is a tool for simulation of a complete computer system, involving the simulation of a superscalar processor and an input and output system, with infrastructure for symmetric multiprocessing. It can also run an operating system in the simulated hardware,...
The embedded multi-media terminal was designed and developed, which using SAMSUNG Corporation's S3C2410 chip as core processor. Firstly, an embedded Linux operating platform has been built in the UP-NETARM2410-S target machine according to system requirements, which includes boot-loader, kernel, file system, and related device drivers. Then the upper computer equipped Qt/Embedded as SDK(Software Development...
In this paper, the embedded web server, which take Samsung corporation's ARM9-S3C2440AL processor as core, is designed, it's operating system is Linux, the system hardware architecture is presented. Then the process of the Linux operating system being transplated on ARM is introduced. The realization of Boa and dynamic interaction between browser and the embedded system by using CGI are especially...
Considering today's hardware performance, in order to obtain best results, a proper programming strategy for optimum mapping of all processes to existing resources is necessary. The presence of multiple cores in a single chip requires applications with a higher level of parallelism. The use of suited mapping algorithms can lead to a great performance improvement considering computing time at a smaller...
The Data Acquisition Backbone Core (DABC) is a new GSI software framework to run data acquisition with distributed event building on high performance Linux clusters. Experimental data input is provided by means of generic Device and Transport interfaces. DABC offers elaborate mechanisms for multiprocessing, buffer management, and dataflow throttling. These are transparently available for all implemented...
Most of embedded multiprocessor platforms are ideal for running diverse operating systems and implementing different applications. Inter-processor communication interface makes it possible for an embedded multi-processor system to easily support multiple subsystems parallel processing. This paper propose a kind of OS-level communication interface implementing method based-on HPI in the Complementary...
Existing multicore systems already provide deep levels of thread parallelism; hybrid programming models and composability of parallel libraries are very active areas of research within the scientific programming community. As more applications and libraries become parallel, scenarios where multiple threads compete for a core are unavoidable. In this paper we evaluate the impact of task oversubscription...
A heterogeneous processor consists of cores that are asymmetric in performance and functionality. Such a design provides a cost-effective solution for processor manufacturers to continuously improve both single-thread performance and multi-thread throughput. This design, however, faces significant challenges in the operating system, which traditionally assumes only homogeneous hardware. This paper...
At present, study on open numerical control (NC) system is increasingly getting attention. Most of these studies concentrated their aims at realizing the open system structure based on PC or IPC (industrial personal computer). Few involved the category of embedded NC (ENC) system, but expectant goals could not be achieved at the performance of real time (RT) and reliability of system response. In...
Motivated by the increasing heterogeneity and complexity of MPSoC systems, we propose a component-based generic approach for MPSoC observation. We show that components help in observing all software levels from system to application. We present the EMBera prototype and relate our experience in implementing it on two different platforms: a Linux-based 16-core SMP machine and a 5-core embedded system...
Multicore architectures, which have multiple processing units on a single chip, have been adopted by most chip manufacturers. Most such chips contain on-chip caches that are shared by some or all of the cores on the chip. Prior work has presented methods for improving the performance of such caches when scheduling soft real-time workloads. Given these methods, two additional research issues arise:...
A parallel computing experimental platform is presented, which is realized based on Xen and OpenMP. Traditional parallel experimental platforms are achieved by many servers. By constructing virtual hardware based on Xen, the platform can be carried out in personal computer (PC), which cost less than one thousand dollars. The software is open source Linux based, which is apt to maintain. The proposed...
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