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Mutiprocessor architecture in embedded computing is becoming widely used. In fact, with specific development tools, platforms such as Xilinx Virtex-5 or Virtex-6 FPGA can implement multiprocessor systems (with soft-core and hard-core processors) {with just a few mouse clicks} and offer the possibility of partial and dynamic reconfiguration. Software tasks are scheduled on these platforms by embedded...
Recently, power consumption of server computers is one of the most important topics. Although DVS (dynamic voltage scaling) can reduce power consumption, this method is only used at idle time or low load computation time, generally. In this paper, we propose a task scheduling algorithm for reducing power consumption especially at high load computation time. DVS is applied to tasks that are not in...
In this paper, we propose a two-phase discrete DVFS algorithm for a multiprocessor system, dedicated to applications where the period of task graph is smaller than the deadline of task. In those applications, multiple task graphs are unrolled and then concatenated together to form a new task graph. The proposed DVFS algorithm is applied to the new-formed task graph to stretch tasks' execution time,...
We consider the problem of power-aware quality of service (QoS) control for soft real-time embedded systems. Applications can have time-varying and scarcely known resource requirements, and can be activated and terminated at any time. However, they have the capability to switch among a discrete set of operation modes with different QoS levels and resource requirements. In addition, the platform provides...
In this paper, we address the global and preemptive energy-aware scheduling problem of sporadic constrained-deadline tasks on DVFS-identical multiprocessor platforms. We propose an online slack reclamation scheme which profits from the discrepancy between the worst- and actual-case execution time of the tasks by slowing down the speed of the processors in order to save energy. Our algorithm called...
Recent accelerators such as GPUs achieve better cost-performance and watt-performance ratio, while the range of their application is more limited than general CPUs. Thus heterogeneous clusters and supercomputers equipped both with accelerators and general CPUs are becoming popular, such as LANL's Roadrunner and our own TSUBAME supercomputer. Under the assumption that many applications will run both...
Along with the prevailing of mobile devices, the demand for efficient power consumption has become one of the major issues in designing embedded system. Dynamic voltage scaling (DVS) is a technique that can reduce energy consumption by changing the processor voltage levels dynamically. Fixed priority with preemption threshold (FPPT) scheduling is a scheduling policy that includes preemptive and non-preemptive...
A power-aware voltage-scheduling heuristic with offline and online components is presented for a hard real-time multi-processor system supporting multiple voltage levels. The offline component determines a voltage configuration for each task in a graph according to the worst-case scenario of task execution, to speed up paths with tasks. Once some path is speeded up, it next chooses and speeds up one...
Energy use of computer communication systems has quickly become a vital design consideration. One effective method for reducing energy consumption is dynamic speed scaling, which adapts the processing speed to the current load. This paper studies how to optimally scale speed to balance mean response time and mean energy consumption under processor sharing scheduling. Both bounds and asymptotics for...
Energy consumption in a computer system can be reduced by dynamic speed scaling, which adapts the processing speed to the current load. This paper studies the optimal way to adjust speed to balance mean response time and mean energy consumption, when jobs arrive as a Poisson process and processor sharing scheduling is used. Both bounds and asymptotics for the optimal speeds are provided. Interestingly,...
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