The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
In this paper a 90deg variable phase shifter operating at 2.3 GHz is presented. This circuit uses a combination of variable gain amplifiers and an analog summation circuit to to control the magnitude of each vector and sum them together. Experimental results show a 93.7deg variable phase shift range while maintaining a 0.08 dB amplitude error. The insertion loss is -4 dB and the input and output reflection...
This paper describes the design issues of the dual modulus divide-by-4/5 prescaler with merged AND gates and HLO-FF topologies fabricated in 0.18 mum CMOS technologies. By the two topologies, the propagation delay and the voltage swing can be reduced to improve the maximum operating frequency. Because the CLK transistors operate at higher frequency, how to choose the CLK transistor size and the bias...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.