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Based on the elastic-plastic model, two-dimensional finite element analysis was used to analyze the Air-Gap Cu interconnects thermal stress behaviors. Firstly, the stress evolution with the Air-Gap interconnect formation process steps was studied. Then, two Air-Gap types of Cu interconnects, with Air-Gap in the metal line level or extending to via level, combined with three different dielectrics were...
The stress of Cu interconnects embedded in advanced ultra-low-k (ULK) dielectrics was studied for different porosities. Interconnects formed a high porosity material result in a lower stress due to relaxation in the plane. This effect is less significant for narrow lines, where in-plane relaxation is reduced by the dense narrow spacing. The stress in isolated lines was found to be independent of dielectric...
The bump on flexible lead (BoFL) is a chip-to-substrate interconnect technology which uses flexible structures to accommodate the CTE mismatch between the chip and PCB substrate and consequently should be reliable without underfill. To achieve a high flexibility, the lead-free bump is located on a flexible lead. The flexible lead consists of a copper redistribution layer (RDL) embedded in a polyimide-bridge...
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