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In this paper, we study residue logarithmic numbers system and design pipelined arithmetic logic unit for Residue Logarithmic Numbers System in order to be used for module set {2n -1,2n ,2n +1} that leads to implementation of integrated circuits for the general module with high speed and security but low power consumption. In this design a combination of two Logarithmic Number System and Residue Numbers...
The discrete Pascal Transform (DPT) has been shown to be very useful in signal and image processing applications in the detection of edges and bumps. In this paper, an efficient low-power VLSI implementation for a 4times4 two-dimensional discrete Pascal transform is presented. The proposed approach uses multiple supply voltage sources and sleep transistors to produce a balance between power savings...
Modulo 2n + 1 multipliers are the primitive computational logic components widely used in residue arithmetic, digital signal processing and cryptography. In this work, a fast low-power hardware implementation of modulo 2n + 1 multiplier is proposed and validated. The proposed hardware architecture is based on the efficient compressors and modulo carry look-ahead adders as the basic building blocks...
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