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The virtual channel flow control approach provides an efficient way for the high throughput of the on-chip routers. However, allocating the virtual channels (VCs) statically results in a waste of the area and energy consumption. To remedy this drawback, we propose a novel dynamic virtual channel architecture (DVCA) in this paper. By inspecting the physical link state and speculating the packet transferring,...
As chip multiprocessors (CMPs) become the only viable way to scale up and utilize the abundant transistors made available in current microprocessors, the design of on-chip networks is becoming critically important. These networks face unique design constraints and are required to provide extremely fast and high bandwidth communication, yet meet tight power and area budgets. In this paper, we present...
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