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The paper proposes a method to use the Fibonacci numbers with odd and even indices for synthesis of switched capacitor converters (SCCs) with multiphase control. As in the previously developed method using high-radix positional numeral systems, the capacitors in the proposed method can be connected in parallel. For this purpose, a special two-dimensional (2D) array of switches is introduced. Thus,...
This paper proposes first-order and third-order Switched Capacitor realizations of fractional order differentiators and integrators. First, the s-to-z transformation is expanded for fractional powers using Taylor series expansion (TSE) and continued fraction expansion (CFE). Then, the stabilized models of the fractional order differentiators and integrators are realized using Switched capacitor (SC)...
Limiting the short-circuit current is of great significance to keep the safe and steady running of the power system. A novel fault current limiter (FCL) is presented. A high speed switch is used to rapidly break the short-circuit current. A triggered vacuum switch (TVS) is used to discharge a precharged pulse capacitor so as to quench the arc in the high speed switch quickly and to realize the active...
With technology scaling, vulnerability to soft errors in random logic is increasing. There is a need for on-line error detection and protection for logic gates even at sea level. The error checker is the key element for an on-line detection mechanism. We compare three different checkers for error detection from the point of view of area, power and false error detection rates. We find that the double...
A high intercept points, cost-effective, and power-efficient switching FET double balanced mixer (DBM) is reported. The Switching FET DBM demonstrated in this work offers input intercept points (IIP3) and conversion loss typically 44 dBm and 8.5 dB respectively with 15 dBm LO power for the frequency band (RF: 900-2150 MHz, LO: 850-1950 MHz, IF: 50-200 MHz). The measured interport isolation is typically...
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