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In this work we propose an efficient parallel algorithm to evaluate an observation sequence on Hidden Markov Model starting from the sequential Forward Algorithm (FA). The Cell Broadband Engine (Cell/B.E.) hybrid architecture, allows us to approach two levels of parallelization in developing our algorithms. Two strategies were implemented and tested in order to obtain a parallel version of the FA,...
In this work we propose an efficient parallel approach of Hidden Markov Model classification based on Cell Broadband Engine (Cell/B.E.) architecture. The Cell/B.E. technology offers us the possibility of developing two level parallelization algorithms due to the hybrid architecture feature of this kind of processors. Based on this concept, we developed and analyzed two different techniques of parallelization...
In this paper the authors propose new heuristics for automation of software partitioning and mapping onto heterogeneous multiprocessor System-on-Chip (MPSoC) platform — Longest Parallel Path mapping algorithm (LPP). In contrast with traditional approach to solving this NP-complete problem — the Integer Linear Programming (ILP), our method uses a modified version of Critical Path Method with additional...
We explore the adaptation of a ranking and selection procedure, originally designed for a sequential computer, to a high-performance (parallel) computing setting. We pay particular attention to screening and explaining why care is required in implementing screening in parallel settings. We develop an algorithm that allows screening at both the master and worker levels, and that apportions work to...
Nowadays, the evolution of multi-core architectures goes towards increasing the number of cores and levels of cache. Meanwhile, current typical parallel programming languages are unable to exploit the potential of these processors efficiently. In order to achieve desired performance on these hardwares we need to understand architectural parameters appropriately and also apply them in algorithm design...
We introduce K-model, a computational model to evaluate the algorithms designed for graphic processors, and other architectures adhering to the stream programming model. We address the lack of a formal complexity model that properly accounts for memory contention, address coalescing in memory accesses, or the serial control of instruction flows. We study the impact of K-model rules on algorithm design...
An automatic task-to-processor mapping algorithm is analyzed in parallel systems that run over loosely coupled distributed architectures. The MPAHA (Model on Parallel Algorithms on Heterogeneous Architectures) model that allows predicting parallel application performance running over heterogeneous architectures is presented. In particular, the heterogeneity of both processors and communications is...
In this paper we describe a method for simulation-based verification of microprocessor units based on cycle-accurate contract specifications. Such specifications describe behavior of a unit in the form of preconditions and postconditions of microoperations. Test sequence generation is based on traversal of FSM constructed automatically from specifications and test coverage definition. We have successfully...
In this paper we present a low cost fault-tolerant attitude determination system to a scientific satellite using COTS devices. We related our experience in developing the attitude determination system, where we combine proven fault tolerance techniques to protect the whole system composed only by COTS from the effects produced by transient faults. We detailed the failure cases and the detection, reconfiguration...
In this paper, we introduce an innovative CNN algorithm development environment that significantly assists algorithmic design. The introduced graphical user interface uses Matlab Simulink with UMF-like program description, where direct functionality accompanies better accessability. The new generation of graphical cards incorporate many general purpose graphics processing units, giving the power of...
A synthetic aperture radar (SAR) data reformatting approach named Doppler Keystone transform (DKT) is proposed to correct the range migration of the moving target. By combining the DKT and the Doppler phase compensation methods, the moving target can be well imaged in high signal-clutter-ratio (SCR) case. Moreover, the DKT-based algorithm is suitable for parallel implementation.
Universal networks offer the advantage that they can execute programs written for simpler architectures without significant run-time overhead. In this paper we investigate simulations of tree machines; the fact that divide-and-conquer algorithms are programmed naturally on trees motivates our investigation. Among various proposals for parallel computing the boolean hypercube has emerged as a particularly...
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