The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Modeling of the DC-DC converter with capacitor Equivalent Series Resistance (esr) is considered in this paper. The operation of the converter in the continuous conduction mode is assumed. The modeling of the converter is based on the state-space averaging technique. The small ripple approximation is assumed in deriving the small-signal linear model of the converter. From the result the small-signal...
A modified converter is proposed and analyzed to drive an inverter of a electric vehicle. The ratio of an output voltage to an input voltage of the proposed converter is equal to that of the general boost converter. The difference between both converters comes from the composition of output terminal. Owing to the discrepancy, working voltage of the output capacitor of the proposed converter becomes...
This paper discusses the validity of platform stitching capacitors in facilitating high-speed differential links signal return path on non-ideal reference plane. A platform design guideline for the stitching capacitor is recommended at the end of this study. The results from this study were used to enable a huge reduction in the number of platform stitching capacitors, which scored major design wins...
With technology scaling, vulnerability to soft errors in random logic is increasing. There is a need for on-line error detection and protection for logic gates even at sea level. The error checker is the key element for an on-line detection mechanism. We compare three different checkers for error detection from the point of view of area, power and false error detection rates. We find that the double...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.