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Due to mismatch in the coefficients of thermal expansion of silicon and copper, mechanical stresses in surrounding silicon are induced near TSV in 3D ICs. In this paper, the mobility variance of substrate material caused by TSV-induced stress is researched. Firstly the semi-analytical model for TSV-induced stress distribution is introduced. An analytical model for TSV-induced stress distribution is...
Due to mismatch in the coefficients of thermal expansion of silicon and copper, mechanical stresses in surrounding silicon are induced near TSV in 3D ICs. In this paper, the mobility variance of substrate material caused by TSV-induced stress is researched. Firstly the semi-analytical model for TSV-induced stress distribution is introduced. An analytical model for TSV-induced stress distribution is...
In this work, we propose an efficient and accurate full-chip thermo-mechanical stress and reliability analysis tool and design optimization methodology to alleviate mechanical reliability issues in 3D ICs. First, we analyze detailed thermo-mechanical stress induced by TSVs in conjunction with various associated structures such as landing pad and dielectric liner. Then, we explore and validate the...
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