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Reconfigurable datapaths can be used to implement multiple applications on the same hardware. Switching between applications can be realized by loading new configuration information into the datapath. In this contribution, we want to use such datapaths for high frequency event processing. We have developed the toolset ReEP, which takes multiple problem descriptions and superposes them into one reconfigurable...
Due to the need to support concurrent executions of versatile applications, the system complexity, in terms of the number of cores, is drastically increased from tens to hundreds or thousands of cores. These complex systems usually contain heterogeneous cores or processing elements such as different processor cores, memories, and several Silicon Intellectual Properties (SIPs). Network-on-chip (NoC)...
With the proliferation of portable devices, new multimedia-centric applications are continuously emerging on the consumer market. These applications are pushing computer architecture to its limit considering their demanding workloads. In addition, these workloads tend to vary significantly at run time as they are driven by a number of factors such as network conditions, application content, and user...
A massively parallel processing array platform for reconfigurable computing is based on a structural object programming model. Objects are software programs running concurrently on hundreds of 32-bit RISC processors and memories. They exchange data and control through a structure of self-synchronizing channels. An IDE compiles source code and block diagrams into a configuration file in less than one...
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