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Power Gating(PG) is very effective to reduce the leakage power. Recently proposed Zigzag power gating(ZPG) technique has the visible advantage on short wake-up time. However, additional PG transistors consume intolerable area overhead. Basing on the BPTM-65nm model, we propose a new optimization methodology of the selective ZPG technique for the wide-used dual-threshold voltage CMOS circuit design...
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