The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
This contribution deals with the novel conception of design approach to RF wideband and multiband receivers. New methodology of spatial sampling and spatial sampling method of standing wave is presented. Front-end RFIC receiver, utilizing spatial sampling method of standing wave for down converting to baseband and demodulation, has been proposed and analyzed. The whole system is proposed to be implemented...
A GSM/EDGE transmitter implemented in 0.13-mum CMOS using offset phase locked loop and direct conversion architecture is presented. The transmitter consists of a DCT, an OPLL with a TXVCO, a fractional-N synthesizer with a RFVCO and LDO regulators. The transmitter delivers 1.5 dBm output power with 1.2deg rms phase error and the modulation spectrum at 400 kHz offset is better than -62 dBc in high...
The emergence of digital mobile broadband communication systems for voice, data, multimedia and positioning is coupled to the continuous progress of silicon CMOS-technology. Single chip integration with digital part while maintaining excellent RF performance, high integration density, low power consumption and low cost under mass production aspects are the current system design challenges. This paper...
In this paper we present the results of several key circuit blocks such as amplifiers, mixers and an oscillator in a 90 nm SOI CMOS technology. The circuits were optimized for low noise. Leading-edge results such as 3.8 dB noise figure (NF) up to 40 GHz and more than 8 dB gain up to 60 GHz for a wideband amplifier, a low loss of only 4.8 dB for a drain pumped transconductance mixer at 35 GHz consuming...
This paper presents a feasibility study on VCO using RF SiP technology, which is an RF application of stacked SiP. An off-chip inductor is implemented in a separated chip, and measured Q factor is 130. A phase noise is -119 dBc/Hz at 1 MHz offset for a 5.84-GHz carrier frequency, and frequency tuning range is 5.73 GHz-5.95 GHz. Power consumption is 1.93 mW, and 180 nm CMOS process is utilized. FOM...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.