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Silicon-controlled rectifier (SCR) has been reported with the good electrostatic discharge (ESD) robustness under the lower parasitic capacitance among ESD devices in CMOS technology. To correctly predict the performances of SCR-based ESD-protected RF circuit, it is essential for RF circuit design with accurate model of SCR device. The small-signal model of SCR in RF frequency band is proposed in...
We report the hot carrier reliability (HCR) of 45-nm SOI CMOS technology. Body contacted devices are shown to be more reliable than floating-body devices. Two different body-contacting schemes are investigated (T-body and notched T- body). The effects of total dose irradiation on reliability are investigated. Body contacted devices are shown to be more tolerant to radiation than floating-body devices...
As CMOS technology advances with increasingly scaled-down chip size and better MOSFET performance, new challenges and opportunities are observed in the innovation and optimization of integrated RF device for state-of-the-art RF system-on-chip (RFSOC). From technology foundry's viewpoint, this paper illustrates the essence of key RF SOC active and passive devices.
High-k, metal gate devices and furthermore multi-gate FETs (MuGFETs) are considered as promising solution for scaling down to 32 nm, 22 nm and 16 nm overcoming the limitations of conventional planar bulk. Especially analog, mixed-signal and RF device and circuit performance is affected by these revolutionary changes in technology. This paper discusses different examples for novel, technology related...
Design and test of high-speed mixed-signal/RF circuits and systems is undergoing a transformation due to the effects of process variations stemming from the use of scaled CMOS technologies that result in significant yield loss. To this effect, post-manufacture tuning for yield recovery is now a necessity for many high-speed electronic circuits and systems and is typically driven by iterative test-and-tune...
The mechanism for ionizing radiation damage in multi-finger SOI CMOS devices is presented for the first time. We analyzed the effects of shallow-trench isolation on ionizing radiation response of 65 nm Silicon-On-Insulator (SOI) CMOS technology. The radiation response of the CMOS devices was investigated using 63 MeV protons and 10 keV X-rays. The implications of proton irradiation and X-ray irradiation...
Scaling of CMOS transistors beyond 45 nm requires architectural redesign of the devices. FinFETs are proposed to recover the reduced channel control. This work evaluates the perspective of RF design in planar bulk vs. FinFET SOI for (sub-)45 nm CMOS on a key RF circuit: a low-noise amplifier (LNA). The planar and FinFET devices with channel lengths down to 40 nm are compared in both wideband and narrowband...
Large electrostatic discharge (ESD) protection devices close to the I/O pins, beneficial for ESD protection, have an adverse effect on the performance of broadband RF circuits for impedance mismatch and bandwidth degradation. A new proposed ESD protection structure, pi-model distributed ESD (pi-DESD) protection circuit, composed of one pair of ESD devices near the I/O pin, the other pair close to...
RF circuits in CMOS ask for adequate ESD protections without deteriorating the RF performance. Standard ESD protections are hindered by parasitic capacitance, area requirements and quality factor. This paper presents N+/Pwell and P+/Nwell STI-bounded diodes with a satisfactory ESD performance, tunable with diode area, and an excellent RF performance.
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