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This paper presents an extended CAD tool compatible with decananometric technologies for sizing OTA architectures. This is based on an extension of the gm/I methodology which uses, as inputs, parameters directly extracted from foundry models and can hence be easily ported to different technologies. This tool was developed in order to fasten and automate design for each OTA architecture. From fixed...
In this paper voltage mode quaternary circuits are introduced. The quaternary circuits are encoder and decoder circuit, half and full adder circuit. Quaternary operators and elements which are used in the implementation of encoder and decoder circuits, half and full adder are also presented. The set of operators are logical sum, logical product, level up, level down, level conversion operator. Quaternary...
The use of multiple voltage domains in an integrated circuit has been widely utilized with the aim of finding a tradeoff between power saving and performance. Level shifters allow for effective interfacing between voltage domains supplied by different voltage levels. In this paper we present a low power level shifters in the 90 nm technology node capable of converting subthreshold voltage signals...
Passive RFID application is often used in back scatter mode where a weak reflected signal is relied upon by reader systems. This limits the application of the technology as the reader and tag distance is constrained. This paper presents a passive design where planar capacitors are used to locally store charges to power a tag based on newer CMOS technology. In this paper BSIM4 transistor model based...
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