The subject of this paper is the fault diagnosis of analog circuits based on the use of nullor concept. The fault location technique presented in the paper can be implemented in the general-purpose analysis program which provides many advantages, of which the most important is the automation of the diagnosis process. A simulation based diagnosis model can be obtained by introducing the norators across the potentially faulty elements and the fixators at the accessible nodes. A practical problem that arises when using this nullor diagnosis model is a lack of an efficient procedure for localization of multiple faults. In the proposed diagnosis technique, the online computational requirements are reduced by introducing a diagnosis model that contains accessible nodes only. The diagnosis model is obtained from the original circuit using relationships among the measured voltages and compensated currents of the faulty elements. The proposed faulty location technique is validated on a benchmark example.