The Monte CarloMonte Carlo method is state-of-the art to verify the performance of wireless communication systems. Statistical simulationssimulations for various signal-to-noise (SNR) operation points are mandatory. Bit error rates (BERs) of 10−9 or even lower require the simulationsimulation of tens to hundreds of thousands of blocks for a single SNR operating point. Therefore, system simulationsimulation in wireless baseband processing is a challenging task. For example, analyzing the error floor in DVB-S2 LDPC channel-decoding systems needs several weeks of simulationsimulation time for one specific set of code parameters. Design validation of hardware architectures is challenging as well for the same reasons. We will present different techniques for accelerating system simulationsimulation with emphasis on channel decoding techniques by distributed software simulationsimulation , accelerated simulationsimulation using the cell processor, and hardware-assisted acceleration using FPGAsFPGAs . Moreover, we will show how design validation of such systems can be accelerated by rapid prototyping.