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A 6-bit time-based folding matrix multiplication technique for support vector machine (SVM) classification is proposed. A voltage controlled oscillator (VCO) based analog-to-digital converter (ADC) performs in-situ matrix multiplications (MM) along with analog to digital conversion. It also offers a low supply voltage of operation (down to 0.4V) and an input range of 0.8V, drawing a total of 376nA...
We present a processing platform that implements DMR with separate clock and power sources to prevent dependent failures working with a reconfigurable cache that includes BIST with self-recovering function to detect transient faults and error prediction to prevent permanent faults. The fault tolerant processor is analyzed to be complying with the ISO26262 SOTIF for ADAS SoC which is fabricated with...
A 77-GHz mixed-mode frequency-modulated continuous-wave (FMCW) signal generator is proposed based on the bang-bang phase detector (BBPD). Instead of employing a linear digital-to-time converter (DTC), a 1-bit 3rd-order singleloop ΔΣ modulator (SLDSM3) and a hybrid finite-impulse response (FIR) filter are utilized to suppress the quantization noise induced by the BBPD. Two-stage infinite-impulse response...
This paper describes a novel fully integrated 35GHz frequency modulated continuous wave (FMCW) PLL with twins-VCO to 7GHz sweeping bandwidth. The proposed FMCW PLL is composed of twins-VCOs, SDM modulator and waveform generator. A novel frequency sweeping extension (FSE) technique is proposed to make the twin-VCOs take turns to sweeping to realize wide sweeping bandwidth without sacrificing the sweeping...
In this paper, we present a temperature compensated semi-digital integer-N PLL realized in a standard 130 nm CMOS technology, which achieves 48 fs rms phase jitter and a FOM of −245 dB. The presented design improves the phase noise performance of previously presented semi-digital PLLs by replacing the ring oscillator VCO by a semi-digitally tuned LC-tank VCO. In contrast to mostly digital PLLs, the...
This work presents an ultra-low phase noise and all-digital frequency generator, providing multiple output-frequencies. In a time-interleaved fashion, the proposed calibrator can continue to correct the multiple output-frequencies of injection-locked DCOs, which can change independently between 0.9 and 1.2GHz. Due to the time-interleaved calibrator, operating continuously in the background, each injection-locked...
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